[llvm] [AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (PR #169213)

[Carl Ritson via llvm-commits]

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@@ -3556,15 +3556,14 @@ bool GCNHazardRecognizer::fixVALUMaskWriteHazard(MachineInstr *MI) {
   };
 
   SmallVector<const MachineInstr *> WaitInstrs;
-  bool HasSGPRRead = false;
   StateType InitialState;
 
   // Look for SGPR write.
   MachineOperand *HazardDef = nullptr;
-  for (MachineOperand &Op : MI->operands()) {
+  for (MachineOperand &Op : MI->all_defs()) {
     if (!Op.isReg())
       continue;
-    if (Op.isDef() && HazardDef)
+    if (HazardDef)
       continue;
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perlfu wrote:

Done, and address the assert below

https://github.com/llvm/llvm-project/pull/169213