[llvm] Revert "[AlwaysInliner] Do not inline on attribute mismatches" (PR #209497)

[Aiden Grossman via llvm-commits]

https://github.com/boomanaiden154 created https://github.com/llvm/llvm-project/pull/209497

Reverts llvm/llvm-project#209345

Seems to break some AArch64 buildbots.

>From 54e44f91290abf90587b28ebedcdcded2b900576 Mon Sep 17 00:00:00 2001
From: Aiden Grossman <agrossman154 at yahoo.com>
Date: Tue, 14 Jul 2026 07:21:16 -0700
Subject: [PATCH] Revert "[AlwaysInliner] Do not inline on attribute
 mismatches"

This reverts commit 37b8e765ce4837a7577e6f762bcdffe4b232759c.
---
 llvm/lib/Transforms/IPO/AlwaysInliner.cpp     | 17 -----------
 ...ays-inline-incompatible-target-features.ll | 29 -------------------
 .../Inline/always-inline-phase-ordering.ll    |  2 +-
 3 files changed, 1 insertion(+), 47 deletions(-)
 delete mode 100644 llvm/test/Transforms/Inline/X86/always-inline-incompatible-target-features.ll

diff --git a/llvm/lib/Transforms/IPO/AlwaysInliner.cpp b/llvm/lib/Transforms/IPO/AlwaysInliner.cpp
index 1bdefb25b8dfb..080cb8ddb33fd 100644
--- a/llvm/lib/Transforms/IPO/AlwaysInliner.cpp
+++ b/llvm/lib/Transforms/IPO/AlwaysInliner.cpp
@@ -21,7 +21,6 @@
 #include "llvm/Analysis/ProfileSummaryInfo.h"
 #include "llvm/Analysis/TargetLibraryInfo.h"
 #include "llvm/Analysis/TargetTransformInfo.h"
-#include "llvm/IR/DiagnosticInfo.h"
 #include "llvm/IR/Module.h"
 #include "llvm/InitializePasses.h"
 #include "llvm/Transforms/Utils/Cloning.h"
@@ -53,22 +52,6 @@ bool AlwaysInlineImpl(
     DebugLoc DLoc = CB.getDebugLoc();
     BasicBlock *Block = CB.getParent();
 
-    TargetTransformInfo &CalleeTTI = GetTTI(Callee);
-    std::optional<InlineResult> CanInlineWithAttributes =
-        getAttributeBasedInliningDecision(CB, &Callee, CalleeTTI, GetTLI);
-    if (!CanInlineWithAttributes || !CanInlineWithAttributes->isSuccess()) {
-      ORE.emit([&]() {
-        return OptimizationRemarkMissed(DEBUG_TYPE, "NotInlined", DLoc, Block)
-               << "'" << ore::NV("Callee", &Callee) << ", is not inlined into"
-               << ore::NV("Caller", Caller) << "': "
-               << ore::NV("Reason",
-                          CanInlineWithAttributes.has_value()
-                              ? CanInlineWithAttributes->getFailureReason()
-                              : "due to incompatible function attributes");
-      });
-      return false;
-    }
-
     InlineFunctionInfo IFI(GetAssumptionCache, &PSI);
     InlineResult Res = InlineFunction(
         CB, IFI, /*MergeAttributes=*/true, &GetAAR(Callee), InsertLifetime,
diff --git a/llvm/test/Transforms/Inline/X86/always-inline-incompatible-target-features.ll b/llvm/test/Transforms/Inline/X86/always-inline-incompatible-target-features.ll
deleted file mode 100644
index e4524c69f0206..0000000000000
--- a/llvm/test/Transforms/Inline/X86/always-inline-incompatible-target-features.ll
+++ /dev/null
@@ -1,29 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
-; RUN: opt -passes=always-inline -S < %s | FileCheck %s
-
-; Check that always-inline does not inline functions with incompatible target
-; features.
-
-target triple = "x86_64-grtev4-linux-gnu"
-
-define i64 @clck(i64 %a) {
-; CHECK-LABEL: define i64 @clck(
-; CHECK-SAME: i64 [[A:%.*]]) {
-; CHECK-NEXT:    [[TMP1:%.*]] = call i64 @dkwaysa(i64 [[A]])
-; CHECK-NEXT:    ret i64 [[TMP1]]
-;
-  %1 = call i64 @dkwaysa(i64 %a)
-  ret i64 %1
-}
-
-define i64 @dkwaysa(i64 %a) #0 {
-; CHECK-LABEL: define i64 @dkwaysa(
-; CHECK-SAME: i64 [[A:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT:    [[TMP1:%.*]] = tail call i64 @llvm.x86.bmi.bzhi.64(i64 1, i64 [[A]])
-; CHECK-NEXT:    ret i64 [[TMP1]]
-;
-  %2 = tail call i64 @llvm.x86.bmi.bzhi.64(i64 1, i64 %a)
-  ret i64 %2
-}
-
-attributes #0 = { alwaysinline "target-features"="+bmi2" }
diff --git a/llvm/test/Transforms/Inline/always-inline-phase-ordering.ll b/llvm/test/Transforms/Inline/always-inline-phase-ordering.ll
index 7beaa5767bd3a..1cfdaddd34a65 100644
--- a/llvm/test/Transforms/Inline/always-inline-phase-ordering.ll
+++ b/llvm/test/Transforms/Inline/always-inline-phase-ordering.ll
@@ -118,7 +118,7 @@ bb:
 }
 
 attributes #0 = { optsize "frame-pointer"="non-leaf" }
-attributes #1 = { optsize }
+attributes #1 = { optsize "target-cpu"="apple-m1" }
 attributes #2 = { optsize alwaysinline }
 
 !llvm.module.flags = !{!0, !1, !30, !31, !32, !36, !37}