The Week Of Monday 7 November 2022 Archives by author
Starting: Mon Nov 7 00:04:17 PST 2022
Ending: Sun Nov 13 23:58:00 PST 2022
Messages: 2025
- [PATCH] D137153: [WIP][X86] Support -march=sierraforest, grandridge, graniterapids.
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D137153: [WIP][X86] Support -march=sierraforest, grandridge, graniterapids.
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D137241: [WIP] Add ExpandLargeFpConvert Pass
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D137695: [X86] Add missing Zen3+ model subtypes
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D137695: [X86] Add missing Zen3 model subtypes
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D137608: [X86] Add In64BitMode predicates for LOCK_INC64m, LOCK_DEC64m
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D137608: [X86] Add In64BitMode predicates for LOCK_INC64m, LOCK_DEC64m
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D137686: [X86] Add In64BitMode requirement for MMXRI
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D137686: [X86] Add In64BitMode requirement for MMXRI
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D137841: [X86] Reduce unnecessary instregex for AlderlakeP schedule model
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D137841: [X86] Reduce unnecessary instregex for AlderlakeP schedule model
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D137841: [X86] Reduce unnecessary instregex for AlderlakeP schedule model
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D137841: [X86] Reduce unnecessary instregex for AlderlakeP schedule model
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D130897: [schedtool] Add schedtool to generate x86 schedmodel automatically
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D130897: [schedtool] Add schedtool to generate x86 schedmodel automatically
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D130897: [schedtool] Add schedtool to generate x86 schedmodel automatically
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D137841: [X86] Reduce unnecessary instregex for AlderlakeP schedule model
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D137841: [X86] Reduce unnecessary instregex for AlderlakeP schedule model
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D137361: IR: Add atomicrmw uinc_wrap and udec_wrap
Ruiling, Song via Phabricator via llvm-commits
- [PATCH] D137338: Fix dupe word typos
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D137338: Fix dupe word typos
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D137418: remove extra slash from llvm github url
Aarush Bhat via Phabricator via llvm-commits
- [compiler-rt] 9e95699 - [clang][Headers] Do not define varargs macros for __need___va_list
Adhemerval Zanella via llvm-commits
- [PATCH] D132224: [Assignment Tracking][5/*] Add core infrastructure for instruction reference
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D137028: [llvm][utils] Add DenseMap data formatters (WIP)
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D137893: [AsmWriter] Do not write a comma when varargs is the only argument
Adrian Vogelsgesang via Phabricator via llvm-commits
- [PATCH] D137893: [AsmWriter] Do not write a comma when varargs is the only argument
Adrian Vogelsgesang via Phabricator via llvm-commits
- [PATCH] D136728: [PowerPC] Add handling for WACC register spilling.
Ahsan Saghir via Phabricator via llvm-commits
- [llvm] f53fde8 - [Docs] Minor Fixups in Advanced Builds Documentation
Aiden Grossman via llvm-commits
- [llvm] f7dea68 - [Docs] Add Documentation on (Thin)LTO + PGO Build Configs
Aiden Grossman via llvm-commits
- [llvm] b9378a6 - [Docs] Add Documentation on BOLT Build Configs
Aiden Grossman via llvm-commits
- [PATCH] D137880: [Docs] Minor Fixups in Advanced Builds Documentation
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D137880: [Docs] Minor Fixups in Advanced Builds Documentation
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D137880: [Docs] Minor Fixups in Advanced Builds Documentation
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D137898: [Docs] Add Documentation on (Thin)LTO + PGO Build Configs
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D137899: [Docs] Add Documentation on BOLT Build Configs
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D137898: [Docs] Add Documentation on (Thin)LTO + PGO Build Configs
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D137899: [Docs] Add Documentation on BOLT Build Configs
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D137898: [Docs] Add Documentation on (Thin)LTO + PGO Build Configs
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D137899: [Docs] Add Documentation on BOLT Build Configs
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D137898: [Docs] Add Documentation on (Thin)LTO + PGO Build Configs
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D137899: [Docs] Add Documentation on BOLT Build Configs
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D137720: Migrate getOrCreateInternalVariable from Clang to OMPIRBuilder.
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D137720: Migrate getOrCreateInternalVariable from Clang to OMPIRBuilder.
Akash Banerjee via Phabricator via llvm-commits
- [llvm] 2958615 - [ObjC][ARC] Fix non-deterministic behavior in ProvenanceAnalysis
Akira Hatanaka via llvm-commits
- [PATCH] D137083: [ObjCARC] Replace parts of ObjCARCAA with intrinsic attributes
Akira Hatanaka via Phabricator via llvm-commits
- [llvm] 885e610 - Revert "[LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally"
Alan Zhao via llvm-commits
- [PATCH] D135427: [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Alan Zhao via Phabricator via llvm-commits
- [PATCH] D135427: [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Alan Zhao via Phabricator via llvm-commits
- [PATCH] D137799: [WIP][llvm-driver] Pass extra arguments to tools
Alex Brachet via Phabricator via llvm-commits
- [PATCH] D137800: [WIP][llvm-driver] Reinvoke clang as described by llvm driver extra args
Alex Brachet via Phabricator via llvm-commits
- [PATCH] D135108: [llvm-driver] Fix clang -fno-integrated-cc1 when invoked from the llvm driver
Alex Brachet via Phabricator via llvm-commits
- [PATCH] D137799: [WIP][llvm-driver] Pass extra arguments to tools
Alex Brachet via Phabricator via llvm-commits
- [PATCH] D137799: [WIP][llvm-driver] Pass extra arguments to tools
Alex Brachet via Phabricator via llvm-commits
- [PATCH] D137309: [clang] Added Swift support for RISCV64
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D136817: [RISCV] Add H extension
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D137309: [clang] Added Swift support for RISCV
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D137452: [RISCV] Support BSET/BCLR/BINV in isAllUsesReadW.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D137450: [RISCV] Support shift/rotate amount operands in isAllUsesReadW.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D137449: [RISCV] Improve support for ADD_UW/SHXADD_UW in isAllUsesReadW.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D137446: [RISCV] Rework isAllUsesReadW in RISCVSExtWRemoval. NFCI
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D137448: [RISCV] Support SB/SH/SW in isAllUsesReadW in RISCVSExtWRemoval.
Alex Bradbury via Phabricator via llvm-commits
- [llvm] 72f8955 - [CodeGen][AArch64] Enable LDAPR under +RCPC
Alexander Shaposhnikov via llvm-commits
- [PATCH] D126250: [CodeGen][AArch64] Add support for LDAPR
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D137590: [CodeGen][AArch64] Enable LDAPR under +RCPC
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D137590: [CodeGen][AArch64] Enable LDAPR under +RCPC
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D134571: [MachO] Support exports trie in both LC_DYLD_INFO and LC_DYLD_EXPORTS_TRIE
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D137590: [CodeGen][AArch64] Enable LDAPR under +RCPC
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D137768: [opt] Enable using -module-summary with -S
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D137768: [opt] Enable using -module-summary with -S
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D137768: [opt] Enable using -module-summary with -S
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D137768: [opt][clang] Enable using -module-summary with -S / -emit-llvm
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D137768: [opt][clang] Enable using -module-summary with -S / -emit-llvm
Alexander Shaposhnikov via Phabricator via llvm-commits
- [llvm] 27091e6 - [PEI][NFC] Refactoring of the debug instructions frame index replacement
Alexander Timofeev via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support re-constructing cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D137882: [DWARFLibrary] Add support to re-construct cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D137882: [DWARFLibrary] Add support to re-construct cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D136169: [AMDGPU] Avoid SCC clobbering before S_CSELECT_B32
Alexander via Phabricator via llvm-commits
- [PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy analysis to check scalar operands of buffer instructions use scalar registers.
Alexander via Phabricator via llvm-commits
- [PATCH] D137574: PEI should be able to use backward walk in replaceFrameIndicesBackward.
Alexander via Phabricator via llvm-commits
- [PATCH] D137574: PEI should be able to use backward walk in replaceFrameIndicesBackward.
Alexander via Phabricator via llvm-commits
- [PATCH] D137574: PEI should be able to use backward walk in replaceFrameIndicesBackward.
Alexander via Phabricator via llvm-commits
- [PATCH] D137574: PEI should be able to use backward walk in replaceFrameIndicesBackward.
Alexander via Phabricator via llvm-commits
- [PATCH] D137574: PEI should be able to use backward walk in replaceFrameIndicesBackward.
Alexander via Phabricator via llvm-commits
- [PATCH] D137741: [PEI][NFC] Refactoring of the debug instructions frame index replacement
Alexander via Phabricator via llvm-commits
- [PATCH] D137574: PEI should be able to use backward walk in replaceFrameIndicesBackward.
Alexander via Phabricator via llvm-commits
- [PATCH] D137741: [PEI][NFC] Refactoring of the debug instructions frame index replacement
Alexander via Phabricator via llvm-commits
- [PATCH] D137574: PEI should be able to use backward walk in replaceFrameIndicesBackward.
Alexander via Phabricator via llvm-commits
- [PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy analysis to check scalar operands of buffer instructions use scalar registers.
Alexander via Phabricator via llvm-commits
- [PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy analysis to check scalar operands of buffer instructions use scalar registers.
Alexander via Phabricator via llvm-commits
- [PATCH] D137101: [CodeView] Replace GHASH hasher by BLAKE3
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D137154: Adding nvvm_reflect clang builtin
Alexey Bader via Phabricator via llvm-commits
- [llvm] 8ddd1cc - [SLP]Redesign vectorization of the gather nodes.
Alexey Bataev via llvm-commits
- [llvm] ecd0b5a - Revert "[SLP]Redesign vectorization of the gather nodes."
Alexey Bataev via llvm-commits
- [llvm] b5d91ab - [SLP]Fix PR58863: Mask index beyond mask size for non-power-2 insertelement analysis.
Alexey Bataev via llvm-commits
- [llvm] 563d03d - [SLP][NFC]Add a test for vectorization with scheduling blocks order
Alexey Bataev via llvm-commits
- [llvm] b505fd5 - [SLP]Redesign vectorization of the gather nodes.
Alexey Bataev via llvm-commits
- [PATCH] D137537: [SLP] Extend reordering data of tree entry to support PHI nodes
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D135174: [SLP]Redesign vectorization of the gather nodes.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D137567: [SLP][NFC] Restructure getInsertIndex
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D137569: [SLP][NFC] Restructure areTwoInsertFromSameBuildVector
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D137567: [SLP][NFC] Restructure getInsertIndex
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D137537: [SLP] Extend reordering data of tree entry to support PHI nodes
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D137639: [SLP]Fix PR58863: Mask index beyond mask size for non-power-2 insertelement analysis.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D137639: [SLP]Fix PR58863: Mask index beyond mask size for non-power-2 insertelement analysis.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D137639: [SLP]Fix PR58863: Mask index beyond mask size for non-power-2 insertelement analysis.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D137851: [OPENMP]Initial support for at clause
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D132994: [RISC-V][HWASAN] Don't explicitly load GOT entry to call hwasan mismatch routine
Alexey Baturo via Phabricator via llvm-commits
- [PATCH] D132995: [RISC-V][HWASAN] Support tagging global variables for RISC-V HWASAN
Alexey Baturo via Phabricator via llvm-commits
- [PATCH] D132994: [RISC-V][HWASAN] Don't explicitly load GOT entry to call hwasan mismatch routine
Alexey Baturo via Phabricator via llvm-commits
- [PATCH] D129107: [BOLT][HUGIFY] adds huge pages support of PIE/no-PIE binaries
Alexey Moksyakov via Phabricator via llvm-commits
- [PATCH] D137615: [BOLT][Instrumentation] Instrument leaves from spanning tree
Alexey Moksyakov via Phabricator via llvm-commits
- [llvm] 57dbca2 - Revert "[Hexagon] Use default attributes for intrinsics"
Alina Sbirlea via llvm-commits
- [PATCH] D137623: [Hexagon] Use default attributes for intrinsics
Alina Sbirlea via Phabricator via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Allen zhong via Phabricator via llvm-commits
- [PATCH] D136623: [InstCombine] enable more factorization in SimplifyUsingDistributiveLaws
Allen zhong via Phabricator via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Allen zhong via Phabricator via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Allen zhong via Phabricator via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Allen zhong via Phabricator via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Allen zhong via Phabricator via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137309: [clang] Added Swift support for RISCV
Alsey Coleman Miller via Phabricator via llvm-commits
- [PATCH] D137489: [LLD][MinGW] Add --error-limit=<N> option
Alvin Wong via Phabricator via llvm-commits
- [llvm] 2179f51 - [AArch64][GlobalISel] Select TBZ for icmp sge x, 0.
Amara Emerson via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D137905: [GlobalISel] Add new G_INVOKE_REGION_START/END instructions to fix an EH bug
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D137899: [Docs] Add Documentation on BOLT Build Configs
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D136992: [PowerPC] Add new load/store with length instructions to Future CPU.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D137643: [PowerPC] Add the SUBFUS instruction to Future CPU.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D137785: [PowerPC][GISel] Add initial GlobalISel support for vector functions.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D137629: [PowerPC] Use default attributes for intrinsics
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D137440: [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV
Andrea Di Biagio via Phabricator via llvm-commits
- [PATCH] D137440: [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV
Andrea Di Biagio via Phabricator via llvm-commits
- [PATCH] D136605: [libc++] Fixes for static libc++ on Windows using VCRuntime ABI
Andrew Ng via Phabricator via llvm-commits
- [PATCH] D137611: cmake: Inline the add_llvm_symbol_exports.py script
Andrew Ng via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D130895: [RISCV] Make VL choosing for a splat-like VMV based on its users
Anton Sidorenko via Phabricator via llvm-commits
- [PATCH] D137154: Adding nvvm_reflect clang builtin
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum/fmaximum into fminnum/fmaxnum + NaN check
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D137154: Adding nvvm_reflect clang builtin
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D136560: llvm-reduce: Try to turn calls into something else
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137149: Use PassGate from LLVMContext if any otherwise global one
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137361: IR: Add atomicrmw uinc_wrap and udec_wrap
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137103: [LegacyPM] Port example pass SimplifyCFG to new PM
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D136617: [opt] Print deprecation warning for use of legacy syntax with new pass manager
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137626: [test] Avoid legacy PM default pipelines (O0, O1 etc) when running opt
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D123481: Do not build with Werror by default (Bazel build)
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137672: [LoopFuse] Ensure inner loops are in loop simplified form under new PM
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137663: [opt] Remove support for using -O[0|1|2|3|s|z] with legacy PM in opt
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D135427: [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D135427: [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D135427: [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137641: [TableGen] Use MemoryEffects to represent intrinsic memory effects (NFCI)
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137796: Remove TargetMachine::adjustPassManager
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D136383: [PartialInlining] Enable recursive partial inlining.
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D133036: [InstCombine] Treat passing undef to noundef params as UB
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137915: [LegacyPM] Remove cl::opts controlling optimization pass manager passes
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137915: [LegacyPM] Remove cl::opts controlling optimization pass manager passes
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137915: [LegacyPM] Remove cl::opts controlling optimization pass manager passes
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D136929: [Statepoint] Use default attributes for some GC intrinsics
Artur Pilipenko via Phabricator via llvm-commits
- [PATCH] D135137: [AggressiveInstCombine] Load merge the reverse load pattern of consecutive loads.
Asmaa via Phabricator via llvm-commits
- [PATCH] D137573: [AVR] Add FeatureEIJMPCALL to FamilyAVR6
Ayke via Phabricator via llvm-commits
- [PATCH] D131867: [AVR] Do not emit instructions invalid for attiny10
Ayke via Phabricator via llvm-commits
- [PATCH] D137473: [vfs] Allow root paths relative to the directory of the vfsoverlay YAML file
Ben Barham via Phabricator via llvm-commits
- [PATCH] D137473: [vfs] Allow root paths relative to the directory of the vfsoverlay YAML file
Ben Barham via Phabricator via llvm-commits
- [PATCH] D137473: [vfs] Allow root paths relative to the directory of the vfsoverlay YAML file
Ben Barham via Phabricator via llvm-commits
- [PATCH] D137573: [AVR] Add FeatureEIJMPCALL to FamilyAVR6
Ben Shi via Phabricator via llvm-commits
- [PATCH] D137573: [AVR] Add FeatureEIJMPCALL to FamilyAVR6
Ben Shi via Phabricator via llvm-commits
- [PATCH] D131867: [AVR] Do not emit instructions invalid for attiny10
Ben Shi via Phabricator via llvm-commits
- [PATCH] D137433: [AArch64][CodeGen] Remove redundant vector negations before concat
Benjamin Maxwell via Phabricator via llvm-commits
- [PATCH] D136672: [ExpandMemCmp][AArch64] Add a new option PreferCmpToExpand in inMemCmpExpansionOptions and enable on AArch64
Benjamin Maxwell via Phabricator via llvm-commits
- [PATCH] D137433: [DAG] Add canonicalization to avoid redundant nots in concat vectors
Benjamin Maxwell via Phabricator via llvm-commits
- [PATCH] D137798: [DAG] Fold zext into loads across an and/or/xor operation
Benjamin Maxwell via Phabricator via llvm-commits
- [PATCH] D137433: [DAG] Add canonicalization to avoid redundant nots in concat vectors
Benjamin Maxwell via Phabricator via llvm-commits
- [PATCH] D137844: [DAG] Fold zext/sext into masked loads with multiple truncate uses
Benjamin Maxwell via Phabricator via llvm-commits
- [PATCH] D137844: [DAG] Fold zext/sext into masked loads with multiple truncate uses
Benjamin Maxwell via Phabricator via llvm-commits
- [PATCH] D137388: [X86] Add necessary check isReg() when updating LiveVariables in convertToThreeAddress
Bing Yu via Phabricator via llvm-commits
- [PATCH] D137388: [X86] Add necessary check isReg() when updating LiveVariables in convertToThreeAddress
Bing Yu via Phabricator via llvm-commits
- [PATCH] D137388: [X86] Add necessary check isReg() when updating LiveVariables in convertToThreeAddress
Bing Yu via Phabricator via llvm-commits
- [llvm] 5bc36c8 - [X86] Add necessary check isReg() when updating LiveVariables in convertToThreeAddress
Bing1 Yu via llvm-commits
- [PATCH] D137201: [AggressiveInstCombine] Handle the insert point of the merged load correctly.
Biplob Mishra via Phabricator via llvm-commits
- [llvm] ac696ac - Use opt -passes=<name> instead of opt -name
Bjorn Pettersson via llvm-commits
- [llvm] 893e351 - [test] Avoid legacy PM default pipelines (O0, O1 etc) when running opt
Bjorn Pettersson via llvm-commits
- [llvm] 7a5332b - [opt] Remove support for using -O[0|1|2|3|s|z] with legacy PM in opt
Bjorn Pettersson via llvm-commits
- [PATCH] D137626: [test] Avoid legacy PM default pipelines (O0, O1 etc) when running opt
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D137626: [test] Avoid legacy PM default pipelines (O0, O1 etc) when running opt
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D137663: [opt] Remove support for using -O[0|1|2|3|s|z] with legacy PM in opt
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D137626: [test] Avoid legacy PM default pipelines (O0, O1 etc) when running opt
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D137663: [opt] Remove support for using -O[0|1|2|3|s|z] with legacy PM in opt
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D137663: [opt] Remove support for using -O[0|1|2|3|s|z] with legacy PM in opt
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D137626: [test] Avoid legacy PM default pipelines (O0, O1 etc) when running opt
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D137663: [opt] Remove support for using -O[0|1|2|3|s|z] with legacy PM in opt
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D137796: Remove TargetMachine::adjustPassManager
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D137663: [opt] Remove support for using -O[0|1|2|3|s|z] with legacy PM in opt
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D137796: Remove TargetMachine::adjustPassManager
Bjorn Pettersson via Phabricator via llvm-commits
- [llvm] 97bb272 - [Support/ELF] - Add OpenBSD PT_OPENBSD_MUTABLE constant.
Brad Smith via llvm-commits
- [PATCH] D137903: [llvm-readelf] - Recognizing 'PT_OPENBSD_MUTABLE' segment type.
Brad Smith via Phabricator via llvm-commits
- [PATCH] D137903: [llvm-readelf] - Recognizing 'PT_OPENBSD_MUTABLE' segment type.
Brad Smith via Phabricator via llvm-commits
- [PATCH] D137903: [llvm-readelf] - Recognizing 'PT_OPENBSD_MUTABLE' segment type.
Brad Smith via Phabricator via llvm-commits
- [PATCH] D137921: [LLD][ELF] Add support for OpenBSD PT_OPENBSD_MUTABLE segment type
Brad Smith via Phabricator via llvm-commits
- [PATCH] D137903: [llvm-readelf] - Recognizing 'PT_OPENBSD_MUTABLE' segment type.
Brad Smith via Phabricator via llvm-commits
- [PATCH] D137903: [llvm] - Recognizing 'PT_OPENBSD_MUTABLE' segment type.
Brad Smith via Phabricator via llvm-commits
- [PATCH] D137292: [lsan] Fix stack buffer overwrite in SuspendedThreadsListMac::GetRegistersAndSP
Brittany Blue Gaston via Phabricator via llvm-commits
- [llvm] 1a91756 - [AArch64]SME2 MOV Instructions
Caroline Concatto via llvm-commits
- [llvm] d917276 - [AArch64]SME2 Single and Multi vector Shift and Multiply instructions
Caroline Concatto via llvm-commits
- [llvm] ecab1bc - [AArch64]SME2 Multi vector Sel Load and Store instructions
Caroline Concatto via llvm-commits
- [PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly
Caroline via Phabricator via llvm-commits
- [PATCH] D136142: [AArch64]SME2 MOV Instructions
Caroline via Phabricator via llvm-commits
- [PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly
Caroline via Phabricator via llvm-commits
- [PATCH] D136150: [AArch64]SME2 Single and Multi vector Shift and Multiply instructions
Caroline via Phabricator via llvm-commits
- [PATCH] D137625: [AArch64][SVE2] Add the SVE2.1 tbxq instruction
Caroline via Phabricator via llvm-commits
- [PATCH] D137619: [AArch64][SVE2] Add the SVE2.1 permute vector elements (quadword) instructions
Caroline via Phabricator via llvm-commits
- [PATCH] D136172: [AArch64]SME2 Multi vector Sel Load and Store instructions
Caroline via Phabricator via llvm-commits
- [PATCH] D136172: [AArch64]SME2 Multi vector Sel Load and Store instructions
Caroline via Phabricator via llvm-commits
- [PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly
Caroline via Phabricator via llvm-commits
- [PATCH] D136172: [AArch64]SME2 Multi vector Sel Load and Store instructions
Caroline via Phabricator via llvm-commits
- [PATCH] D136172: [AArch64]SME2 Multi vector Sel Load and Store instructions
Caroline via Phabricator via llvm-commits
- [PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly
Caroline via Phabricator via llvm-commits
- [PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly
Caroline via Phabricator via llvm-commits
- [PATCH] D136172: [AArch64]SME2 Multi vector Sel Load and Store instructions
Caroline via Phabricator via llvm-commits
- [PATCH] D129405: Addition of S_POGODATA field to PDB for better PGO analysis
Chandrasekar Balachandran via Phabricator via llvm-commits
- [PATCH] D129405: Addition of S_POGODATA field to PDB for better PGO analysis
Chandrasekar Balachandran via Phabricator via llvm-commits
- [PATCH] D129405: Addition of S_POGODATA field to PDB for better PGO analysis
Chandrasekar Balachandran via Phabricator via llvm-commits
- [PATCH] D137752: [InstCombine] PR58901 - fix bug with swapping GEP of different types
Chang Lin via Phabricator via llvm-commits
- [llvm] eb421c0 - [PowerPC][NFC] fix the LIT regressions
Chen Zheng via llvm-commits
- [llvm] 6ceb607 - [PowerPC][NFC] remove the rop-protect attribute in LIT cases.
Chen Zheng via llvm-commits
- [llvm] 454758a - [PowerPC] add a new subtarget feature fastMFLR
Chen Zheng via llvm-commits
- [PATCH] D137423: [PowerPC] make expensive mflr be away from its user in the function prologue
ChenZheng via Phabricator via llvm-commits
- [PATCH] D137612: [PowerPC] add a new subtarget feature CheapMFLR
ChenZheng via Phabricator via llvm-commits
- [PATCH] D137423: [PowerPC] make expensive mflr be away from its user in the function prologue
ChenZheng via Phabricator via llvm-commits
- [PATCH] D137423: [PowerPC] make expensive mflr be away from its user in the function prologue
ChenZheng via Phabricator via llvm-commits
- [PATCH] D135847: [PowerPC] don't check CTR clobber in hardware loop insertion pass
ChenZheng via Phabricator via llvm-commits
- [PATCH] D137483: [NFC][PowerPC] Add NFC fixes to PPCInstrinfo.cpp when getting the defined machine instruction.
ChenZheng via Phabricator via llvm-commits
- [PATCH] D137612: [PowerPC] add a new subtarget feature FastMFLR
ChenZheng via Phabricator via llvm-commits
- [PATCH] D137423: [PowerPC] make expensive mflr be away from its user in the function prologue
ChenZheng via Phabricator via llvm-commits
- [PATCH] D137758: [HardwareLoops] remove loops which has undef count
ChenZheng via Phabricator via llvm-commits
- [PATCH] D137612: [PowerPC] add a new subtarget feature FastMFLR
ChenZheng via Phabricator via llvm-commits
- [PATCH] D137758: [HardwareLoops] remove loops which has undef count
ChenZheng via Phabricator via llvm-commits
- [PATCH] D137758: [HardwareLoops] remove loops which has undef count
ChenZheng via Phabricator via llvm-commits
- [PATCH] D137758: [HardwareLoops] remove loops which has undef count
ChenZheng via Phabricator via llvm-commits
- [PATCH] D135847: [PowerPC] don't check CTR clobber in hardware loop insertion pass
ChenZheng via Phabricator via llvm-commits
- [PATCH] D137820: [MemoryBuffer] Allow optionally specifying desired buffer alignment
Chris Lattner via Phabricator via llvm-commits
- [PATCH] D134949: [AMDGPU][SIFrameLowering] Use the right frame register in CSR spills
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D124195: [AMDGPU] Separate out SGPR spills to VGPR lanes during PEI
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D124195: [AMDGPU] Separate out SGPR spills to VGPR lanes during PEI
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D137892: [AMDGPU] Remove the assertion for MUBUF instruction with voffset
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D137892: [AMDGPU] Remove the assertion for MUBUF instruction with voffset
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D124196: [AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D124195: [AMDGPU] Separate out SGPR spills to VGPR lanes during PEI
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D134949: [AMDGPU][SIFrameLowering] Use the right frame register in CSR spills
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D137724: [CMake] Warn when the version is older than 3.20.0.
Chuanqi Xu via Phabricator via llvm-commits
- [PATCH] D137866: [Coroutines] Do not add allocas for retcon coroutines
Chuanqi Xu via Phabricator via llvm-commits
- [PATCH] D136749: [Don't Commit] [DRAFT] Workaround the example in 57861
Chuanqi Xu via Phabricator via llvm-commits
- [PATCH] D135808: [LoopInterchange] Correcting the profitability checking for vectorization
Congzhe Cao via Phabricator via llvm-commits
- [PATCH] D137461: [LoopInterchange] Refactor and rewrite validDepInterchange()
Congzhe Cao via Phabricator via llvm-commits
- [PATCH] D137672: [LoopFuse] Ensure inner loops are in loop simplified form under new PM
Congzhe Cao via Phabricator via llvm-commits
- [llvm] 5e3df94 - [RISCV] Rework hasAllWUsers in RISCVSExtWRemoval. NFCI
Craig Topper via llvm-commits
- [llvm] 7f018b4 - [RISCV] Support SB/SH/SW in hasAllWUsers in RISCVSExtWRemoval.
Craig Topper via llvm-commits
- [llvm] bc6df57 - [RISCV] Improve support for ADD_UW/SHXADD_UW in hasAllWUsers.
Craig Topper via llvm-commits
- [llvm] 902976a - [RISCV] Support shift/rotate amount operands in isAllUsesReadW.
Craig Topper via llvm-commits
- [llvm] 0b01aeb - [RISCV] Support BSET/BCLR/BINV in hasAllWUsers.
Craig Topper via llvm-commits
- [llvm] e80e65d - [RISCV] Add OPCFG format of vector. NFC
Craig Topper via llvm-commits
- [llvm] 48c4da2 - [RISCV] Use OPCFG format record for vsetvli in tablgen. NFC
Craig Topper via llvm-commits
- [llvm] bc6666a - [RISCV] Remove unused CHECK lines from test. NFC
Craig Topper via llvm-commits
- [llvm] ae503d3 - [RISCV] Use template to reduce some code. NFC
Craig Topper via llvm-commits
- [llvm] a9f9520 - [RISCV] Rename template parameter. NFC
Craig Topper via llvm-commits
- [llvm] 9e14ffa - [RISCV] Add PACK/PACKH/PACKW to hasAllWUsers in RISCVSExtWRemoval.
Craig Topper via llvm-commits
- [llvm] 6373f8c - [RISCV] Add BREV8 to hasAllWUsers in RISCVSExtWRemoval.
Craig Topper via llvm-commits
- [llvm] 95388f7 - [RISCV] Improve selection of PACK/PACKW for AssertZExt input.
Craig Topper via llvm-commits
- [llvm] fe0d4ba - [RISCV] Add test for incorrect sext.w removal. NFC
Craig Topper via llvm-commits
- [llvm] 03f9009 - [RISCV] Fix incorrect early out from isSignExtendedW in RISCVSExtWRemoval.
Craig Topper via llvm-commits
- [llvm] 1a8ba9e - [RISCV] Improve selection of PACKW.
Craig Topper via llvm-commits
- [llvm] 1f25888 - [RISCV] Add PACKW and PACKH to isSignExtendingOpW in RISCVSExtWRemoval.
Craig Topper via llvm-commits
- [llvm] 40ae4b8 - [RISCV] Improve PACKH instruction selection
Craig Topper via llvm-commits
- [llvm] 3ac93d1 - [RISCV] Add another PACKH pattern.
Craig Topper via llvm-commits
- [llvm] 3b75979 - [RISCV] Add PACKH/PACKW/PACK to hasAllNBitUsers.
Craig Topper via llvm-commits
- [PATCH] D134089: [clang] Mention vector in the description for -mno-implict-float.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137446: [RISCV] Rework isAllUsesReadW in RISCVSExtWRemoval. NFCI
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137448: [RISCV] Support SB/SH/SW in isAllUsesReadW in RISCVSExtWRemoval.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137449: [RISCV] Improve support for ADD_UW/SHXADD_UW in isAllUsesReadW.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137450: [RISCV] Support shift/rotate amount operands in isAllUsesReadW.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137452: [RISCV] Support BSET/BCLR/BINV in isAllUsesReadW.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137694: [RISCV] Add OPCFG format of vector
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137694: [RISCV] Add OPCFG format of vector
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137694: [RISCV] Add OPCFG format of vector
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137808: [RISCV] Add OPCFG format and use it for vsetvli. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137694: [RISCV] Add OPCFG format of vector
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137808: [RISCV] Add OPCFG format and use it for vsetvli. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137699: [RISCV] Don't use zero-stride vector load if there's no optimized u-arch
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137685: [VP][RISCV] Add vp.nearbyint and RISC-V support.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137530: [RISCV] Splat scalar to be of length VL instead of 1 for reductions
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137886: [RISCV] Add isel patterns to select slli+shXadd.uw.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137422: [DAGCombine] Generalize foldSelectCCToShiftAnd
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137907: [RISCV][NFC] Remove dead code.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137904: [RISCV] Provide a isOneSourceVECTOR_SHUFFLE function. NFC.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137904: [RISCV] Provide a isOneSourceVECTOR_SHUFFLE function. NFC.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137703: [RISCV] Pre-commit test.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget all block and loop dispositions after flatten
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137321: [AArch64][SVE2] Add the SVE2.1 BF16 instructions
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D137715: [AArch64][SVE] Add more ptest removal tests
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D137716: [AArch64][SVE] Fix bad PTEST(PG, OP(PG, ...)) optimization
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D137717: [AArch64][SVE] Fix bad PTEST(X, X) optimization
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D137718: [AArch64][SVE] Fix bad PTEST(PTRUE_ALL, PTEST_LIKE) optimization
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D128631: [AArch64] Initial sched model for Neoverse N2
Cullen Rhodes via Phabricator via llvm-commits
- [lld] 79f9f1f - [lld-macho] Ensure that chained fixups data comes first in __LINKEDIT
Daniel Bertalan via llvm-commits
- [lld] 948fc66 - [lld-macho] Set 4-byte alignment for `__init_offsets`
Daniel Bertalan via llvm-commits
- [PATCH] D137492: [lld-macho] Ensure that chained fixups data comes first in __LINKEDIT
Daniel Bertalan via Phabricator via llvm-commits
- [PATCH] D137803: [lld-macho] Set 4-byte alignment for `__init_offsets`
Daniel Bertalan via Phabricator via llvm-commits
- [PATCH] D137803: [lld-macho] Set 4-byte alignment for `__init_offsets`
Daniel Bertalan via Phabricator via llvm-commits
- [PATCH] D123394: [CodeGen] Late cleanup of redundant address/immediate definitions.
Daniel Kiss via Phabricator via llvm-commits
- [PATCH] D137617: [AArch64] Allow users-facing feature names in clang target attributes
Daniel Kiss via Phabricator via llvm-commits
- [llvm] cf15d23 - [ObjectYAML] Basic support for chained fixups.
Daniel Rodríguez Troitiño via llvm-commits
- [llvm] dd2165e - [objcopy] Fix order of Mach-O LINKEDIT pieces during layout
Daniel Rodríguez Troitiño via llvm-commits
- [PATCH] D134571: [MachO] Support exports trie in both LC_DYLD_INFO and LC_DYLD_EXPORTS_TRIE
Daniel Rodríguez Troitiño via Phabricator via llvm-commits
- [PATCH] D134250: [ObjectYAML] Basic support for chained fixups.
Daniel Rodríguez Troitiño via Phabricator via llvm-commits
- [PATCH] D133974: [objcopy] Fix order of Mach-O LINKEDIT pieces during layout
Daniel Rodríguez Troitiño via Phabricator via llvm-commits
- [PATCH] D134571: [MachO] Support exports trie in both LC_DYLD_INFO and LC_DYLD_EXPORTS_TRIE
Daniel Rodríguez Troitiño via Phabricator via llvm-commits
- [PATCH] D134250: [ObjectYAML] Basic support for chained fixups.
Daniel Rodríguez Troitiño via Phabricator via llvm-commits
- [PATCH] D133974: [objcopy] Fix order of Mach-O LINKEDIT pieces during layout
Daniel Rodríguez Troitiño via Phabricator via llvm-commits
- [PATCH] D134571: [MachO] Support exports trie in both LC_DYLD_INFO and LC_DYLD_EXPORTS_TRIE
Daniel Rodríguez Troitiño via Phabricator via llvm-commits
- [PATCH] D137879: [MachO][ObjCopy] Handle exports trie in LC_DYLD_INFO and LC_DYLD_EXPORTS_TRIE
Daniel Rodríguez Troitiño via Phabricator via llvm-commits
- [llvm] 32a02a9 - [Debuginfod] DEBUGINFOD_HEADERS_FILE environment variable
Daniel Thornburgh via llvm-commits
- [llvm] 20d6f63 - [llvm-debuginfod-find] Fix test/behavior on Windows.
Daniel Thornburgh via llvm-commits
- [PATCH] D137360: [Linker] Remove nocallback attribute while linking
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D136303: [Debuginfod] DEBUGINFOD_HEADERS_FILE environment variable.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D136303: [Debuginfod] DEBUGINFOD_HEADERS_FILE environment variable.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D136303: [Debuginfod] DEBUGINFOD_HEADERS_FILE environment variable.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D136303: [Debuginfod] DEBUGINFOD_HEADERS_FILE environment variable.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D136303: [Debuginfod] DEBUGINFOD_HEADERS_FILE environment variable
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D136303: [Debuginfod] DEBUGINFOD_HEADERS_FILE environment variable
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D136702: [llvm-cov] Look up object files using debuginfod.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D136702: [llvm-cov] Look up object files using debuginfod.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D136702: [llvm-cov] Look up object files using debuginfod.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D136702: [llvm-cov] Look up object files using debuginfod.
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D136014: Recommit [AArch64] Improve codegen for shifted mask op
Dave Green via Phabricator via llvm-commits
- [PATCH] D137435: [InstSimplify] (~A & B) | ~(A | B) --> ~A with logical and
Dave Green via Phabricator via llvm-commits
- [PATCH] D137260: [AArch64InstPrinter] Print TargetAddress as an uint64_t
Dave Green via Phabricator via llvm-commits
- [PATCH] D136771: [AArch64] Canonicalize SIGN_EXTEND to VSELECT
Dave Green via Phabricator via llvm-commits
- [PATCH] D137617: [AArch64] Allow users-facing feature names in clang target attributes
Dave Green via Phabricator via llvm-commits
- [PATCH] D137069: [AArch64] Support all extend op for pattern: (ExtendNode - Y) + Z --> (Z - Y) + ExtendNode
Dave Green via Phabricator via llvm-commits
- [PATCH] D137465: [AArch64]Combine BFXIL to ORR with right shift for ISD::OR instruction selection
Dave Green via Phabricator via llvm-commits
- [PATCH] D137260: [AArch64InstPrinter] Print TargetAddress as an uint64_t
Dave Green via Phabricator via llvm-commits
- [PATCH] D137069: [AArch64] Support all extend op for pattern: (ExtendNode - Y) + Z --> (Z - Y) + ExtendNode
Dave Green via Phabricator via llvm-commits
- [PATCH] D137617: [AArch64] Allow users-facing feature names in clang target attributes
Dave Green via Phabricator via llvm-commits
- [PATCH] D137069: [AArch64] Support all extend/shift op for pattern: (ExtendOrShfitNode - Y) + Z --> (Z - Y) + ExtendOrShfitNode
Dave Green via Phabricator via llvm-commits
- [PATCH] D135991: [AArch64] Fix cost model for `udiv` instruction when one of the operands is a uniform constant
Dave Green via Phabricator via llvm-commits
- [PATCH] D134711: [AArch64] Select SMULL for zero extended vectors when top bit is zero
Dave Green via Phabricator via llvm-commits
- [PATCH] D136722: [AArch64] Extending lowering of 'zext <Y x i8> %x to <Y x i8X>' to use tbl instructions
Dave Green via Phabricator via llvm-commits
- [PATCH] D135991: [AArch64] Fix cost model for `udiv` instruction when one of the operands is a uniform constant
Dave Green via Phabricator via llvm-commits
- [PATCH] D137726: [AArch64] Allow sinking both extract and splat to smull
Dave Green via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Dave Green via Phabricator via llvm-commits
- [PATCH] D134711: [AArch64] Select SMULL for zero extended vectors when top bit is zero
Dave Green via Phabricator via llvm-commits
- [PATCH] D137689: [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand
Dave Green via Phabricator via llvm-commits
- [PATCH] D137201: [AggressiveInstCombine] Handle the insert point of the merged load correctly.
Dave Green via Phabricator via llvm-commits
- [PATCH] D114174: [ARM][CodeGen] Add support for complex deinterleaving
Dave Green via Phabricator via llvm-commits
- [PATCH] D137797: [NFC][AArch64]Call encoding functions for left-shift immediate (which is no-op in terms of value but better code style)
Dave Green via Phabricator via llvm-commits
- [PATCH] D137689: [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand
Dave Green via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Dave Green via Phabricator via llvm-commits
- [PATCH] D137726: [AArch64] Allow sinking both extract and splat to smull
Dave Green via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Dave Green via Phabricator via llvm-commits
- [PATCH] D137028: [llvm][utils] Add DenseMap data formatters (WIP)
Dave Lee via Phabricator via llvm-commits
- [PATCH] D137028: [llvm][utils] Add DenseMap data formatters (WIP)
Dave Lee via Phabricator via llvm-commits
- [PATCH] D137028: [llvm][utils] Add DenseMap data formatters (WIP)
Dave Lee via Phabricator via llvm-commits
- [PATCH] D137028: [llvm][utils] Add DenseMap data formatters (WIP)
Dave Lee via Phabricator via llvm-commits
- [llvm] 5617fb1 - [MLGO][NFC] Use std::map instead of DenseMap to avoid use after free
David Blaikie via llvm-commits
- [llvm] 632a389 - Revert "[llvm][NFC] Use c++17 style variable type traits"
David Blaikie via llvm-commits
- [PATCH] D137493: [llvm][NFC] Use c++17 style variable type traits
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137173: Add deduction guides for IRBuilder
David Blaikie via Phabricator via llvm-commits
- [PATCH] D130221: [ORC] Fix macho section name typo
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137434: [lit] Add `target=<triple>` as a feature keyword
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137152: Fix crash when using embedded DWARF-5 debugging info
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137601: Only hash the start of keys in StringMap
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137173: Add deduction guides for IRBuilder
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137434: [lit] Add `target=<triple>` as a feature keyword
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137434: [lit] Add `target=<triple>` as a feature keyword
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137164: [LLParser] Handle mixed blockaddress forward references with names and IDs
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137434: [lit] Add `target=<triple>` as a feature keyword
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137820: [MemoryBuffer] Allow optionally specifying desired buffer alignment
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
David Blaikie via Phabricator via llvm-commits
- [PATCH] D137882: [DWARFLibrary] Add support to re-construct cu-index
David Blaikie via Phabricator via llvm-commits
- [llvm] 9e885d9 - [InstSimplify] Add tests for (~A & B) | ~(A | B) --> ~A with logical And. NFC
David Green via llvm-commits
- [llvm] b46427b - [InstSimplify] (~A & B) | ~(A | B) --> ~A with logical and
David Green via llvm-commits
- [llvm] a1e7992 - [AArch64] Add smull sinking extract-and-splat tests and regenerate neon-vmull-high-p8.ll. NFC
David Green via llvm-commits
- [llvm] e643411 - [AArch64] Allow sinking both extract and splat to smull
David Green via llvm-commits
- [llvm] 12a6572 - [AArch64] Add SME2.1 target feature for Armv9-A 2022 Architecture Extension
David Sherwood via llvm-commits
- [llvm] cf69895 - [AArch64][SVE2] Add the SVE2.1 BF16 instructions
David Sherwood via llvm-commits
- [llvm] a9d7b18 - [AArch64][SVE2] Add the SVE2.1 quadword variants of ld1w/ld1d/st1w/st1d
David Sherwood via llvm-commits
- [llvm] 1781309 - [AArch64][SVE2] Add the SVE2.1 FP quadword reduction instructions
David Sherwood via llvm-commits
- [llvm] 8f60eee - [AArch64][SVE2] Add the SVE2.1 dupq and extq instructions
David Sherwood via llvm-commits
- [llvm] b048b1b - [AArch64][SVE2] Add the SVE2.1 pmov instructions
David Sherwood via llvm-commits
- [llvm] 78f11a3 - [AArch64][SVE2] Add the SVE2.1 quadword structured load/store instructions
David Sherwood via llvm-commits
- [llvm] 835de8d - [AArch64][SVE2] Add the SVE2.1 integer quadword reduction instructions
David Sherwood via llvm-commits
- [llvm] e3fef88 - [AArch64][SVE2] Add the SVE2.1 tbxq instruction
David Sherwood via llvm-commits
- [llvm] 098e201 - [AArch64][SVE2] Add the SVE2.1 permute vector elements (quadword) instructions
David Sherwood via llvm-commits
- [PATCH] D137245: [AArch64][SVE2] Add the SVE2.1 quadword variants of ld1w/ld1d/st1w/st1d
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137245: [AArch64][SVE2] Add the SVE2.1 quadword variants of ld1w/ld1d/st1w/st1d
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137321: [AArch64][SVE2] Add the SVE2.1 BF16 instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137321: [AArch64][SVE2] Add the SVE2.1 BF16 instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137419: [AArch64][SVE2] Add the SVE2.1 FP quadword reduction instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137411: [AArch64][SVE2] Add the SVE2.1 logical quadword reduction instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137410: [AArch64] Add SME2.1 target feature for Armv9-A 2022 Architecture Extension
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137321: [AArch64][SVE2] Add the SVE2.1 BF16 instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137554: [AArch64][SVE2] Add the SVE2.1 quadword structured load/store instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137554: [AArch64][SVE2] Add the SVE2.1 quadword structured load/store instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137245: [AArch64][SVE2] Add the SVE2.1 quadword variants of ld1w/ld1d/st1w/st1d
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137561: [AArch64][SVE2] Add the SVE2.1 pmov instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137568: [AArch64][SVE2] Add the SVE2.1 dupq and extq instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137619: [AArch64][SVE2] Add the SVE2.1 permute vector elements (quadword) instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137419: [AArch64][SVE2] Add the SVE2.1 FP quadword reduction instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137568: [AArch64][SVE2] Add the SVE2.1 dupq and extq instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137568: [AArch64][SVE2] Add the SVE2.1 dupq and extq instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137625: [AArch64][SVE2] Add the SVE2.1 tbxq instruction
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137561: [AArch64][SVE2] Add the SVE2.1 pmov instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137554: [AArch64][SVE2] Add the SVE2.1 quadword structured load/store instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137093: [AArch64-SVE]: Force generating code compatible to streaming mode
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137093: [AArch64-SVE]: Force generating code compatible to streaming mode
David Sherwood via Phabricator via llvm-commits
- [PATCH] D136858: [AArch64-SVE]: Force generating code compatible to streaming mode for sve-fixed-length tests.
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137554: [AArch64][SVE2] Add the SVE2.1 quadword structured load/store instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137561: [AArch64][SVE2] Add the SVE2.1 pmov instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137554: [AArch64][SVE2] Add the SVE2.1 quadword structured load/store instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137625: [AArch64][SVE2] Add the SVE2.1 tbxq instruction
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137619: [AArch64][SVE2] Add the SVE2.1 permute vector elements (quadword) instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137411: [AArch64][SVE2] Add the SVE2.1 integer quadword reduction instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137411: [AArch64][SVE2] Add the SVE2.1 integer quadword reduction instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137412: [AArch64][SVE2] Add the SVE2.1 add quadword reduction instruction
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137420: [AArch64][SVE2] Add the SVE2.1 integer quadword min/max reduction instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137619: [AArch64][SVE2] Add the SVE2.1 permute vector elements (quadword) instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137619: [AArch64][SVE2] Add the SVE2.1 permute vector elements (quadword) instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137625: [AArch64][SVE2] Add the SVE2.1 tbxq instruction
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137411: [AArch64][SVE2] Add the SVE2.1 integer quadword reduction instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137093: [AArch64][SVE][NFC] Add streaming mode SVE tests
David Sherwood via Phabricator via llvm-commits
- [PATCH] D136361: [AArch64][SME] Disable GlobalISel/FastISel for SME functions.
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137619: [AArch64][SVE2] Add the SVE2.1 permute vector elements (quadword) instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137625: [AArch64][SVE2] Add the SVE2.1 tbxq instruction
David Sherwood via Phabricator via llvm-commits
- [PATCH] D137619: [AArch64][SVE2] Add the SVE2.1 permute vector elements (quadword) instructions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D113359: [Libomptarget][WIP] Introduce VGPU Plugin
Deepak Eachempati via Phabricator via llvm-commits
- [PATCH] D132045: [OpenMPOpt] Improving memory transfer latency hiding
Delaram Talaashrafi via Phabricator via llvm-commits
- [PATCH] D137616: [BOLT][NFC] Fix possible use-after-free
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D102107: [OpenMP] Codegen aggregate for outlined function captures
Dhruva Chakrabarti via Phabricator via llvm-commits
- [PATCH] D134195: [PowerPC] XCOFF exception section support on the integrated assembler path
Digger Lin via Phabricator via llvm-commits
- [PATCH] D137230: [XCOFF] avoid unnecessary Fixups when -function-sections is enabled.
Digger Lin via Phabricator via llvm-commits
- [PATCH] D137230: [XCOFF] avoid unnecessary Fixups when -function-sections is enabled.
Digger Lin via Phabricator via llvm-commits
- [PATCH] D135887: [XCOFF] llvvm-readobj support display symbol table of loader section of xcoff object file.
Digger Lin via Phabricator via llvm-commits
- [PATCH] D135887: [XCOFF] llvvm-readobj support display symbol table of loader section of xcoff object file.
Digger Lin via Phabricator via llvm-commits
- [PATCH] D135887: [XCOFF] llvvm-readobj support display symbol table of loader section of xcoff object file.
Digger Lin via Phabricator via llvm-commits
- [PATCH] D135887: [XCOFF] llvvm-readobj support display symbol table of loader section of xcoff object file.
Digger Lin via Phabricator via llvm-commits
- [PATCH] D137230: [XCOFF] avoid unnecessary Fixups when -function-sections is enabled.
Digger Lin via Phabricator via llvm-commits
- [PATCH] D130718: [compiler-rt] [builtins] Detect _Float16 support at compile time
Dimitry Andric via Phabricator via llvm-commits
- [llvm] 0e52030 - [AArch64][SVE] Migrate tests to use opaque pointers (NFC)
Dinar Temirbulatov via llvm-commits
- [PATCH] D137547: Use ptrue instruction for get_active_lane_mask instrinis if range is from 0 to SVE prdicator constant
Dinar Temirbulatov via Phabricator via llvm-commits
- [PATCH] D137547: [AArch64][SVE] Use PTRUE instruction for get_active_lane_mask intrinsic if the range is from 0 to SVE predicator constant
Dinar Temirbulatov via Phabricator via llvm-commits
- [PATCH] D133955: [AArch64][CostModel] Add costs for fixed operations when using fixed vectors over SVE
Dinar Temirbulatov via Phabricator via llvm-commits
- [llvm] ebac599 - [SimpleLoopUnswitch] Skip trivial selects in guards conditions unswitch candidates
Dmitry Makogon via llvm-commits
- [llvm] 4b0fd43 - [Test] Add tests with range checks with known constant ranges
Dmitry Makogon via llvm-commits
- [llvm] b1e9c43 - [Test] Add test for crash in IRCE when IV is AddRec for another loop
Dmitry Makogon via llvm-commits
- [PATCH] D137249: [SimpleLoopUnswitch] Skip trivial selects when adding guards conditions to unswitch candidates
Dmitry Makogon via Phabricator via llvm-commits
- [PATCH] D137632: [LoopPredication] Widen checks if condition operands constant ranges are known
Dmitry Makogon via Phabricator via llvm-commits
- [PATCH] D137822: [IRCE] Bail out if Start AddRec is for another loop
Dmitry Makogon via Phabricator via llvm-commits
- [llvm] 6e279f5 - [AMDGPU][MC][GFX10+] Enable literal operands with permlane16/permlanex16
Dmitry Preobrazhensky via llvm-commits
- [llvm] 8f68952 - [AMDGPU][MC][GFX11][NFC] Correct VINTERP src operands
Dmitry Preobrazhensky via llvm-commits
- [llvm] 05baf68 - [AMDGPU][MC] Disable SGPRs as src operands of VOP3 VINTRP instructions
Dmitry Preobrazhensky via llvm-commits
- [PATCH] D137332: [AMDGPU][MC][GFX10+] Enable literal operands with permlane16/permlanex16
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137238: [AMDGPU][MC][GFX11][NFC] Correct VINTERP src operands
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137549: [AsmParser] Match mandatory operands following optional operands.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137575: [AMDGPU][MC] Disable SGPRs as src operands of VOP3 VINTRP instructions
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137549: [AsmParser] Match mandatory operands following optional operands.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137549: [AsmParser] Match mandatory operands following optional operands.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137638: [AMDGPU][AsmParser] Remove extra checks on missing instruction modifiers.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137575: [AMDGPU][MC] Disable SGPRs as src operands of VOP3 VINTRP instructions
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137842: [AMDGPU][MC][GFX11] Improve diagnostic messages for invalid VOPD syntax
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D136847: [RISCV][NFC] Mark rs1 in most memory instructions as memory operand.
Dmitry via Phabricator via llvm-commits
- [PATCH] D137473: [vfs] Allow root paths relative to the directory of the vfsoverlay YAML file
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [PATCH] D137164: [LLParser] Handle mixed blockaddress forward references with names and IDs
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [PATCH] D137164: [LLParser] Handle mixed blockaddress forward references with names and IDs
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [PATCH] D137834: [Support] Reduce Dependence on Host.h
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [PATCH] D136344: [ELF][RISCV] Merge `riscv.attributes` sections from all input files
Elena Lepilkina via Phabricator via llvm-commits
- [PATCH] D136344: [ELF][RISCV] Merge `riscv.attributes` sections from all input files
Elena Lepilkina via Phabricator via llvm-commits
- [PATCH] D137044: [ClangFE] Add support for option -mno-pic-data-is-text-relative
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D102817: [Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D137588: [ScalarEvolution] Skip values from unreachable bbs for phi ranges.
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D137590: [CodeGen][AArch64] Enable LDAPR under +RCPC
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D136525: [M68k] Add codegen pattern for atomic load / store
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D137590: [CodeGen][AArch64] Enable LDAPR under +RCPC
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D136383: [PartialInlining] Enable recursive partial inlining.
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D136702: [llvm-cov] Look up object files using debuginfod.
Ellis Hoag via Phabricator via llvm-commits
- [PATCH] D137601: Only hash the start of keys in StringMap
Erik Desjardins via Phabricator via llvm-commits
- [PATCH] D137819: [XCOFF] support the overflow section.
Esme Yi via Phabricator via llvm-commits
- [PATCH] D137230: [XCOFF] avoid unnecessary Fixups when -function-sections is enabled.
Esme Yi via Phabricator via llvm-commits
- [PATCH] D137230: [XCOFF] avoid unnecessary Fixups when -function-sections is enabled.
Esme Yi via Phabricator via llvm-commits
- [PATCH] D137352: [scudo] Detect double free when running with MTE.
Evgenii Stepanov via Phabricator via llvm-commits
- [PATCH] D137666: [msan] Increase size of app/shadow/origin mappings on aarch64
Evgenii Stepanov via Phabricator via llvm-commits
- [PATCH] D137666: [msan] Increase size of app/shadow/origin mappings on aarch64
Evgenii Stepanov via Phabricator via llvm-commits
- [PATCH] D137354: [scudo] Extend basic test to cover zero size allocs.
Evgenii Stepanov via Phabricator via llvm-commits
- [PATCH] D137352: [scudo] Detect double free when running with MTE.
Evgenii Stepanov via Phabricator via llvm-commits
- [PATCH] D137666: [msan] Increase size of app/shadow/origin mappings on aarch64
Evgenii Stepanov via Phabricator via llvm-commits
- [PATCH] D137149: Use PassGate from LLVMContext if any otherwise global one
Evgeniy via Phabricator via llvm-commits
- [PATCH] D115713: [LV] Don't apply "TinyTripCountVectorThreshold" for loops with compile time known TC.
Evgeniy via Phabricator via llvm-commits
- [PATCH] D115713: [LV] Don't apply "TinyTripCountVectorThreshold" for loops with compile time known TC.
Evgeniy via Phabricator via llvm-commits
- [PATCH] D137149: Use PassGate from LLVMContext if any otherwise global one
Evgeniy via Phabricator via llvm-commits
- [PATCH] D115713: [LV] Don't apply "TinyTripCountVectorThreshold" for loops with compile time known TC.
Evgeniy via Phabricator via llvm-commits
- [PATCH] D115713: [LV] Don't apply "TinyTripCountVectorThreshold" for loops with compile time known TC.
Evgeniy via Phabricator via llvm-commits
- [PATCH] D137165: [JumpThreading] Copy profile metadata on select unfolding
Evgeniy via Phabricator via llvm-commits
- [PATCH] D136827: [JT][CT] Preserve exisiting BPI/BFI during JumpThreading
Evgeniy via Phabricator via llvm-commits
- [PATCH] D137149: Use PassGate from LLVMContext if any otherwise global one
Evgeniy via Phabricator via llvm-commits
- [PATCH] D102107: [OpenMP] Codegen aggregate for outlined function captures
Fabio Luporini via Phabricator via llvm-commits
- [llvm] 90ad3e3 - [IR] Allow available_externally GlobalAlias
Fangrui Song via llvm-commits
- [llvm] 89ddcff - [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Fangrui Song via llvm-commits
- [lld] eedbe44 - [LLD] Enable --no-undefined-version by default.
Fangrui Song via llvm-commits
- [compiler-rt] 674a17e - MIPS/compiler_rt: use synci to flush icache on r6
Fangrui Song via llvm-commits
- [lld] 640d9b3 - [lld] Fix duplicate word typos. NFC
Fangrui Song via llvm-commits
- [llvm] 7f07c4d - [SanitizerCoverage] Fix wrong pointer type return from CreateSecStartEnd()
Fangrui Song via llvm-commits
- [llvm] 8901635 - [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Fangrui Song via llvm-commits
- [llvm] dc4a729 - [TableGen] Remove unneeded flush and add missing newline
Fangrui Song via llvm-commits
- [llvm] ff1ebcc - DecoderEmitter: Simplify addOneOperandFields. NFC
Fangrui Song via llvm-commits
- [PATCH] D137441: [IR] Allow available_externally GlobalAlias
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D135427: [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137044: [ClangFE] Add support for option -mno-pic-data-is-text-relative
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D136303: [Debuginfod] DEBUGINFOD_HEADERS_FILE environment variable
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D135590: [ThinLTO][ELF] Add a ThinLTO warning if cache_size_bytes or cache_size_files is too small for the current link job.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D136146: [Clang][LoongArch] Handle -march/-m{single,double,soft}-float/-mfpu options
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137724: [CMake] Warn when the version is older than 3.20.0.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137434: [lit] Add `target=<triple>` as a feature keyword
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137310: [NFC][SanitizerCoverage] fix wrong pointer type return from CreateSecStartEnd()
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137310: [SanitizerCoverage] Fix wrong pointer type return from CreateSecStartEnd()
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D123968: docs: Add instructions for stand-alone builds of clang
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D123968: docs: Add instructions for stand-alone builds of clang
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D135590: [ThinLTO][ELF] Add a ThinLTO warning if cache_size_bytes or cache_size_files is too small for the current link job.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137628: [LoongArch] Implement MCTargetExpr::fixELFSymbolsInTLSFixups hook
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D135427: [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D135427: [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D135427: [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D135427: [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137628: [LoongArch] Implement MCTargetExpr::fixELFSymbolsInTLSFixups hook
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137838: [RFC][Support] Move TargetParsers to new component
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137837: [Support] Move Target/CPU Printing out of CommandLine
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137834: [Support] Reduce Dependence on Host.h
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137834: [Support] Reduce Dependence on Host.h
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137837: [Support] Move Target/CPU Printing out of CommandLine
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D52369: [tblgen][disasm] Allow multiple encodings to disassemble to the same instruction
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137653: [TableGen] More named sub-operands work.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137915: [LegacyPM] Remove cl::opts controlling optimization pass manager passes
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D137381: [clang][compiler-rt] Exception escape out of an non-unwinding function is an undefined behaviour
Fangrui Song via Phabricator via llvm-commits
- [llvm] 2d7e5e2 - [LV] Remove unused OrigLoopID argument from completeLoopSekelton (NFC).
Florian Hahn via llvm-commits
- [llvm] 7854a1a - [SimpleLoopUnswitch] Forget SCEVs for replaced phis.
Florian Hahn via llvm-commits
- [llvm] 758699c - [VectorUtils] Skip interleave members with diff type and alloca sizes.
Florian Hahn via llvm-commits
- [PATCH] D136068: [VPlan] Update VPValue::getDef to return VPRecipeBase* (NFC).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137553: [MemorySSA] Delete dead MemoryUseOrDef for CallInst when clone loop basicblock
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137553: [MemorySSA] Delete dead MemoryUseOrDef for CallInst when clone loop basicblock
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D136068: [VPlan] Update VPValue::getDef to return VPRecipeBase* (NFC).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137588: [ScalarEvolution] Skip values from unreachable bbs for phi ranges.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget all block and loop dispositions after flatten
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget all block and loop dispositions after flatten
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137758: [HardwareLoops] remove loops which has undef count
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137505: [SCEV] Cache ZExt SCEV expressions.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137849: [SCEV] Cache folded SExt SCEV expressions.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137847: [ConstraintElimination] Make decompose() infallible
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137848: [ConstraintElimination] Add Decomposition class (NFCI)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137910: [SimpleLoopUnswitch] Forget loop if its one of user was replaced
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137848: [ConstraintElimination] Add Decomposition class (NFCI)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137516: [TargetSupport] Move TargetParser API in a separate LLVM component.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D137517: [TargetSupport] Generate the defs for RISCV CPUs using llvm-tblgen.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D137516: [TargetSupport] Move TargetParser API in a separate LLVM component.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D137517: [TargetSupport] Generate the defs for RISCV CPUs using llvm-tblgen.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D137517: [TargetSupport] Generate the defs for RISCV CPUs using llvm-tblgen.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D137838: [RFC][Support] Move TargetParsers to new component
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D137517: [TargetSupport] Generate the defs for RISCV CPUs using llvm-tblgen.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D137517: [TargetSupport] Generate the defs for RISCV CPUs using llvm-tblgen.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D137516: [TargetSupport] Move TargetParser API in a separate LLVM component.
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D137633: [RISCV][NFC] Fix unused variable warning.
Fraser Cormack via Phabricator via llvm-commits
- [llvm] 84a18a2 - [X86] Support -march=sierraforest, grandridge, graniterapids.
Freddy Ye via llvm-commits
- [PATCH] D129106: [RISCV] Add support for static chain
Funan Zeng via Phabricator via llvm-commits
- [PATCH] D137695: [X86] Add missing Zen3+ model subtypes
Ganesh Gopalasubramanian via Phabricator via llvm-commits
- [PATCH] D135579: utils/update_mir_test_checks.py: allow checking fixedStack in .mir files
Gaëtan Bossu via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Geoffrey Martin-Noble via Phabricator via llvm-commits
- [PATCH] D123481: Do not build with Werror by default (Bazel build)
Geoffrey Martin-Noble via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Geoffrey Martin-Noble via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Geoffrey Martin-Noble via Phabricator via llvm-commits
- [PATCH] D137316: [Clang][LoongArch] Implement __builtin_loongarch_crc_w_d_w builtin and add diagnostics
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D137316: [Clang][LoongArch] Implement __builtin_loongarch_crc_w_d_w builtin and add diagnostics
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D136906: [Clang][LoongArch] Implement __builtin_loongarch_dbar builtin
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D136906: [Clang][LoongArch] Implement __builtin_loongarch_dbar builtin
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D137687: [LoongArch] Fix atomic store pointer operand sequence error
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D137687: [LoongArch] Fix atomic store pointer operand sequence error
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D136146: [Clang][LoongArch] Handle -march/-m{single,double,soft}-float/-mfpu options
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D136906: [Clang][LoongArch] Implement __builtin_loongarch_dbar builtin
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D137316: [Clang][LoongArch] Implement __builtin_loongarch_crc_w_d_w builtin and add diagnostics
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D137884: [LoongArch] Eliminate extra un-accounted-for successors
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D137532: [LoongArch] Implement the TargetLowering::getRegisterByName hook
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D137532: [LoongArch] Implement the TargetLowering::getRegisterByName hook
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D137311: [LoongArch] Expand atomicrmw fadd/fsub/fmin/fmax with CmpXChg
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D137532: [LoongArch] Implement the TargetLowering::getRegisterByName hook
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Goran Flegar via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Goran Flegar via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Goran Flegar via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Goran Flegar via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Goran Flegar via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Goran Flegar via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Goran Flegar via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Goran Flegar via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Goran Flegar via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Goran Flegar via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum/fmaximum into fminnum/fmaxnum + NaN check
Goran Flegar via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum/fmaximum into fminnum/fmaxnum + NaN check
Goran Flegar via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Greg Clayton via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Greg Clayton via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Greg Clayton via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Greg Clayton via Phabricator via llvm-commits
- [PATCH] D137657: [DWARFLibrary] Add support to re-construct cu-index
Greg Clayton via Phabricator via llvm-commits
- [PATCH] D137788: [sanitizers] [windows] Correctly override functions with backward jmps
Greg Stoll via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D137724: [CMake] Warn when the version is older than 3.20.0.
Guillot Tony via Phabricator via llvm-commits
- [PATCH] D137810: [AArch64] Correctly recognize -reserve-regs-for-regalloc=X30,X29
Guozhi Wei via Phabricator via llvm-commits
- [PATCH] D137222: [MachineCSE] Allow CSE for instructions with ignorable operands
Guozhi Wei via Phabricator via llvm-commits
- [PATCH] D137610: [CodeGen] Refactor ExpandBVWithShuffles. NFC.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137635: [CodeGen] Add sources to isVectorClearMaskLegal. NFC.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137635: [CodeGen] Add sources to isVectorClearMaskLegal. NFC.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137635: [CodeGen] Add sources to isVectorClearMaskLegal. NFC.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137688: [CodeGen] Refactor visitSCALAR_TO_VECTOR. NFC.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137703: [RISCV] Pre-commit test.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137904: [RISCV] Provide a isOneSourceVECTOR_SHUFFLE function. NFC.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137904: [RISCV] Provide a isOneSourceVECTOR_SHUFFLE function. NFC.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Han-Kuan Chen via Phabricator via llvm-commits
- [lld] 265a730 - Use double hashes for non-run/check lines in lld/test/ELF/basic.s
Hans Wennborg via llvm-commits
- [lld] 19a7939 - [lld] Check errors from expanding response files
Hans Wennborg via llvm-commits
- [PATCH] D137477: [lld] Check errors from expanding response files
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D137322: [clang][pdb] Don't include -fmessage-length in PDB buildinfo
Hans Wennborg via Phabricator via llvm-commits
- [llvm] 1c35535 - [X86] Add In64BitMode predicates for LOCK_INC64m, LOCK_DEC64m
Haohai Wen via llvm-commits
- [llvm] b17b25d - [X86] Add In64BitMode requirement for MMXRI
Haohai Wen via llvm-commits
- [llvm] 8b3f783 - [X86] Reduce unnecessary instregex for AlderlakeP schedule model
Haohai Wen via llvm-commits
- [llvm] 625796f - Fix an unused-variable warning in release build, NFC.
Haojian Wu via llvm-commits
- [PATCH] D137473: [vfs] Allow root paths relative to the directory of the vfsoverlay YAML file
Haowei Wu via Phabricator via llvm-commits
- [PATCH] D137473: [vfs] Allow root paths relative to the directory of the vfsoverlay YAML file
Haowei Wu via Phabricator via llvm-commits
- [PATCH] D137473: [vfs] Allow root paths relative to the directory of the vfsoverlay YAML file
Haowei Wu via Phabricator via llvm-commits
- [PATCH] D118514: [doc] Add llvm-ifs commandline guide
Haowei Wu via Phabricator via llvm-commits
- [PATCH] D137473: [vfs] Allow root paths relative to the directory of the vfsoverlay YAML file
Haowei Wu via Phabricator via llvm-commits
- [PATCH] D137473: [vfs] Allow root paths relative to the directory of the vfsoverlay YAML file
Haowei Wu via Phabricator via llvm-commits
- [llvm] af0f151 - [AArch64-SVE][streaming-mode]: Add tests for masked/truncating/extending load/store.
Hassnaa Hamdi via llvm-commits
- [llvm] 9564897 - [AArch64-SVE]: Force generating code compatible to streaming mode.
Hassnaa Hamdi via llvm-commits
- [llvm] 22eef90 - [AArch64][SVE][NFC] Add streaming mode SVE tests
Hassnaa Hamdi via llvm-commits
- [PATCH] D136858: [AArch64-SVE]: Force generating code compatible to streaming mode for sve-fixed-length tests.
Hassnaa Hamdi via Phabricator via llvm-commits
- [PATCH] D136858: [AArch64-SVE]: Force generating code compatible to streaming mode for sve-fixed-length tests.
Hassnaa Hamdi via Phabricator via llvm-commits
- [PATCH] D137093: [AArch64][SVE][NFC] Add streaming mode SVE tests
Hassnaa Hamdi via Phabricator via llvm-commits
- [PATCH] D137093: [AArch64][SVE][NFC] Add streaming mode SVE tests
Hassnaa Hamdi via Phabricator via llvm-commits
- [PATCH] D136585: [AArch64-SVE]: Add tests for masked/truncating/extending load/store while streaming mode is enabled.
Hassnaa Hamdi via Phabricator via llvm-commits
- [PATCH] D135324: [AArch64-SVE]: force using SVE in streaming mode to lower arithmetic and logical fixed-width vector ops.
Hassnaa Hamdi via Phabricator via llvm-commits
- [PATCH] D137260: [AArch64InstPrinter] Print TargetAddress as an uint64_t
Holio Lin via Phabricator via llvm-commits
- [PATCH] D137260: [AArch64InstPrinter] Print TargetAddress as an uint64_t
Holio Lin via Phabricator via llvm-commits
- [PATCH] D137260: [AArch64InstPrinter] Print TargetAddress as an uint64_t
Holio Lin via Phabricator via llvm-commits
- [PATCH] D137260: [AArch64InstPrinter] Print TargetAddress as an uint64_t
Holio Lin via Phabricator via llvm-commits
- [PATCH] D137260: [AArch64InstPrinter] Print TargetAddress as an uint64_t
Holio Lin via Phabricator via llvm-commits
- [PATCH] D137260: [AArch64InstPrinter] Print TargetAddress as an uint64_t
Holio Lin via Phabricator via llvm-commits
- [PATCH] D137230: [XCOFF] avoid unnecessary Fixups when -function-sections is enabled.
Hubert Tong via Phabricator via llvm-commits
- [PATCH] D137154: Adding nvvm_reflect clang builtin
Hugh Delaney via Phabricator via llvm-commits
- [PATCH] D134277: [RISCV] Combine comparison and logic ops.
Ilya Andreev via Phabricator via llvm-commits
- [llvm] af6b1f7 - [AsmParser] Match mandatory operands following optional operands.
Ivan Kosarev via llvm-commits
- [llvm] ef848f2 - [AsmParser] Match mandatory operands following optional operands.
Ivan Kosarev via llvm-commits
- [llvm] 926acd2 - [AMDGPU][AsmParser] Remove extra checks on missing instruction modifiers.
Ivan Kosarev via llvm-commits
- [PATCH] D137549: [AsmParser] Match mandatory operands following optional operands.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137549: [AsmParser] Match mandatory operands following optional operands.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137549: [AsmParser] Match mandatory operands following optional operands.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137549: [AsmParser] Match mandatory operands following optional operands.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137638: [AMDGPU][AsmParser] Remove extra checks on missing instruction modifiers.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137549: [AsmParser] Match mandatory operands following optional operands.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137549: [AsmParser] Match mandatory operands following optional operands.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137549: [AsmParser] Match mandatory operands following optional operands.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137549: [AsmParser] Match mandatory operands following optional operands.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137638: [AMDGPU][AsmParser] Remove extra checks on missing instruction modifiers.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D136702: [llvm-cov] Look up object files using debuginfod.
James Henderson via Phabricator via llvm-commits
- [PATCH] D135887: [XCOFF] llvvm-readobj support display symbol table of loader section of xcoff object file.
James Henderson via Phabricator via llvm-commits
- [PATCH] D136702: [llvm-cov] Look up object files using debuginfod.
James Henderson via Phabricator via llvm-commits
- [PATCH] D137653: [TableGen] More named sub-operands work.
James Y Knight via Phabricator via llvm-commits
- [PATCH] D137656: [PowerPC] Switch to by-name matching for instructions.
James Y Knight via Phabricator via llvm-commits
- [PATCH] D137661: [PowerPC] Switch to by-name matching for instructions (part 1 of 2).
James Y Knight via Phabricator via llvm-commits
- [PATCH] D137656: [PowerPC] Switch to by-name matching for instructions.
James Y Knight via Phabricator via llvm-commits
- [PATCH] D137661: [PowerPC] Switch to by-name matching for instructions (part 1 of 2).
James Y Knight via Phabricator via llvm-commits
- [PATCH] D137670: [PowerPC] Switch to by-name matching for instructions (part 2 of 2).
James Y Knight via Phabricator via llvm-commits
- [PATCH] D137727: [SPARC] Simplify instruction decoder.
James Y Knight via Phabricator via llvm-commits
- [PATCH] D137601: Only hash the start of keys in StringMap
Jamie Hill-Daniel via Phabricator via llvm-commits
- [PATCH] D137601: Only hash the start of keys in StringMap
Jamie Hill-Daniel via Phabricator via llvm-commits
- [PATCH] D137587: [OpenMP][OMPIRBuilder] Migrate target outlined function registration to OMPIRBuilder from clang
Jan Sjödin via Phabricator via llvm-commits
- [PATCH] D137587: [OpenMP][OMPIRBuilder] Migrate target outlined function registration to OMPIRBuilder from clang
Jan Sjödin via Phabricator via llvm-commits
- [PATCH] D137587: [OpenMP][OMPIRBuilder] Migrate target outlined function registration to OMPIRBuilder from clang
Jan Sjödin via Phabricator via llvm-commits
- [PATCH] D137725: [OpenMP][OMPIRBuilder] Mirgrate getName from clang to OMPIRBuilder
Jan Sjödin via Phabricator via llvm-commits
- [PATCH] D137725: [OpenMP][OMPIRBuilder] Mirgrate getName from clang to OMPIRBuilder
Jan Sjödin via Phabricator via llvm-commits
- [PATCH] D135128: [clang][cli] Simplify repetitive macro invocations
Jan Svoboda via Phabricator via llvm-commits
- [PATCH] D135447: [AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp class support and introduce GlobalISel implementation for AMDGPU
Janek van Oirschot via Phabricator via llvm-commits
- [PATCH] D135447: [AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp class support and introduce GlobalISel implementation for AMDGPU
Janek van Oirschot via Phabricator via llvm-commits
- [PATCH] D135447: [AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp class support and introduce GlobalISel implementation for AMDGPU
Janek van Oirschot via Phabricator via llvm-commits
- [PATCH] D135447: [AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp class support and introduce GlobalISel implementation for AMDGPU
Janek van Oirschot via Phabricator via llvm-commits
- [llvm] e044796 - [llvm-diff] Fix false-positive diffs on forward-referencing phi nodes
Jannik Silvanus via llvm-commits
- [PATCH] D137318: [llvm-diff] Fix false-positive diffs on forward-referencing phi nodes
Jannik Silvanus via Phabricator via llvm-commits
- [llvm] a2a4ccd - add LoongArchTargetParser.def to LLVM_Utils module
Jason Molenda via llvm-commits
- [llvm] b8651a1 - [AMDGPU] Merge GlobalISel tests into SelectionDAG tests. NFC.
Jay Foad via llvm-commits
- [llvm] 69dd991 - [AMDGPU] Declutter applyPreexistingWaitcnt()
Jay Foad via llvm-commits
- [PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy analysis to check scalar operands of buffer instructions use scalar registers.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Jay Foad via Phabricator via llvm-commits
- [PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy analysis to check scalar operands of buffer instructions use scalar registers.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137539: [SIFoldOperands] Small code cleanups, NFC.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137540: [AMDGPU] Add & use `hasNamedOperand`, NFC
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137538: [SIFoldOperands] Move `isFoldableCopy` into a separate helper, NFC.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137533: [AMDGPU] Merge GlobalISel tests into SelectionDAG tests. NFC.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy analysis to check scalar operands of buffer instructions use scalar registers.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137624: [AMDGPU] Declutter applyPreexistingWaitcnt()
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137624: [AMDGPU] Declutter applyPreexistingWaitcnt()
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137705: [AMDGPU] Add DAG Combine for right-shift carry add to uaddo
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137705: [AMDGPU] Add DAG Combine for right-shift carry add to uaddo
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137574: PEI should be able to use backward walk in replaceFrameIndicesBackward.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy analysis to check scalar operands of buffer instructions use scalar registers.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137767: [AMDGPU] Add aperture register 64 bit variants
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137767: [AMDGPU] Add aperture register 64 bit variants
Jay Foad via Phabricator via llvm-commits
- [PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137779: [AMDGPU] Select S_LSHR_B64 for uniform fshr
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137779: [AMDGPU] Select S_LSHR_B64 for uniform fshr
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137780: [AMDGPU] Select S_CSELECT_B32 for uniform extensions from i1
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137780: [AMDGPU] Select S_CSELECT_B32 for uniform extensions from i1
Jay Foad via Phabricator via llvm-commits
- [PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Jay Foad via Phabricator via llvm-commits
- [PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D135447: [AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp class support and introduce GlobalISel implementation for AMDGPU
Jay Foad via Phabricator via llvm-commits
- [PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137843: AMDGPU: Fold llvm.amdgcn.sqrt(undef)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137811: InstCombine: Port amdgcn.class intrinsic combines to is.fpclass
Jay Foad via Phabricator via llvm-commits
- [PATCH] D137851: [OPENMP]Initial support for at clause
Jennifer Yu via Phabricator via llvm-commits
- [PATCH] D137851: [OPENMP]Initial support for at clause
Jennifer Yu via Phabricator via llvm-commits
- [PATCH] D137851: [OPENMP]Initial support for at clause
Jennifer Yu via Phabricator via llvm-commits
- [PATCH] D137851: [OPENMP]Initial support for at clause
Jennifer Yu via Phabricator via llvm-commits
- [PATCH] D137851: [OPENMP]Initial support for at clause
Jennifer Yu via Phabricator via llvm-commits
- [PATCH] D137851: [OPENMP]Initial support for at clause
Jennifer Yu via Phabricator via llvm-commits
- [PATCH] D137517: [TargetSupport] Generate the defs for RISCV CPUs using llvm-tblgen.
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D132994: [RISC-V][HWASAN] Don't explicitly load GOT entry to call hwasan mismatch routine
Jessica Clarke via Phabricator via llvm-commits
- [lld] 213dbdb - [lld-macho] Overhaul map file code
Jez Ng via llvm-commits
- [lld] 7f07799 - [lld-macho] Emit map file entry for compact unwind info
Jez Ng via llvm-commits
- [lld] 1a2bc10 - [lld-macho] Fix bugs around EH_Frame symbols
Jez Ng via llvm-commits
- [PATCH] D137492: [lld-macho] Ensure that chained fixups data comes first in __LINKEDIT
Jez Ng via Phabricator via llvm-commits
- [PATCH] D137368: [lld-macho] Overhaul map file code
Jez Ng via Phabricator via llvm-commits
- [PATCH] D137369: [lld-macho] Emit map file entry for compact unwind info
Jez Ng via Phabricator via llvm-commits
- [PATCH] D137370: [lld-macho] Fix bugs around EH_Frame symbols
Jez Ng via Phabricator via llvm-commits
- [PATCH] D137368: [lld-macho] Overhaul map file code
Jez Ng via Phabricator via llvm-commits
- [PATCH] D137803: [lld-macho] Set 4-byte alignment for `__init_offsets`
Jez Ng via Phabricator via llvm-commits
- [PATCH] D133829: [RISCV] Add cost model for insertelement/extractelement of vector type that should be splitted.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D137694: [RISCV] Add OPCFG format of vector
Jiejie Rong via Phabricator via llvm-commits
- [PATCH] D137694: [RISCV] Add OPCFG format of vector
Jiejie Rong via Phabricator via llvm-commits
- [PATCH] D137808: [RISCV] Add OPCFG format and use it for vsetvli. NFC
Jiejie Rong via Phabricator via llvm-commits
- [PATCH] D137694: [RISCV] Add OPCFG format of vector
Jiejie Rong via Phabricator via llvm-commits
- [PATCH] D137384: [MC][LoongArch] Fix needsRelocateWithSymbol() implementation
Jinyang He via Phabricator via llvm-commits
- [PATCH] D137575: [AMDGPU][MC] Disable SGPRs as src operands of VOP3 VINTRP instructions
Joe Nash via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Joe Nash via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Joe Nash via Phabricator via llvm-commits
- [PATCH] D137842: [AMDGPU][MC][GFX11] Improve diagnostic messages for invalid VOPD syntax
Joe Nash via Phabricator via llvm-commits
- [PATCH] D137360: [Linker] Remove nocallback attribute while linking
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D137587: [OpenMP][OMPIRBuilder] Migrate target outlined function registration to OMPIRBuilder from clang
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D137725: [OpenMP][OMPIRBuilder] Mirgrate getName from clang to OMPIRBuilder
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D137720: Migrate getOrCreateInternalVariable from Clang to OMPIRBuilder.
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D137630: [IR] Don't assume readnone/readonly intrinsics are willreturn
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D136809: [CMake] Make sure all headers are installed into `CLANG_RESOURCE_DIR`
John Ericson via Phabricator via llvm-commits
- [PATCH] D132608: [CMake] Clean up CMake binary dir handling
John Ericson via Phabricator via llvm-commits
- [PATCH] D132608: [CMake] Clean up CMake binary dir handling
John Ericson via Phabricator via llvm-commits
- [PATCH] D133890: [CMake] Do these replacements to make use of D132608
John Ericson via Phabricator via llvm-commits
- [PATCH] D137083: [ObjCARC] Replace parts of ObjCARCAA with intrinsic attributes
John McCall via Phabricator via llvm-commits
- [llvm] e9a2aa6 - [amdgpu][lds] Use a consistent order of fields in generated structs
Jon Chesterfield via llvm-commits
- [lld] b1fdeee - Revert "[LLD] Enable --no-undefined-version by default."
Jon Chesterfield via llvm-commits
- [llvm] 0ba0398 - [amdgpu][lds] Use the same isKernel predicate consistently
Jon Chesterfield via llvm-commits
- [llvm] 56202c5 - Revert "[amdgpu][lds] Use the same isKernel predicate consistently"
Jon Chesterfield via llvm-commits
- [PATCH] D137361: IR: Add atomicrmw uinc_wrap and udec_wrap
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D136598: [amdgpu][lds] Use a consistent order of fields in generated structs
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D136599: [amdgpu][lds] Use the same isKernel predicate consistently
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D136599: [amdgpu][lds] Use the same isKernel predicate consistently
Jon Chesterfield via Phabricator via llvm-commits
- [PATCH] D123394: [CodeGen] Late cleanup of redundant address/immediate definitions.
Jonas Paulsson via Phabricator via llvm-commits
- [PATCH] D137791: [SDAG] bail out of mergeTruncStores() if there's an unknown store in the chain
Jonas Paulsson via Phabricator via llvm-commits
- [PATCH] D137791: [SDAG] bail out of mergeTruncStores() if there's an unknown store in the chain
Jonas Paulsson via Phabricator via llvm-commits
- [PATCH] D137044: [ClangFE] Add support for option -mno-pic-data-is-text-relative
Jonas Paulsson via Phabricator via llvm-commits
- [llvm] e8f8b89 - [NFC] Ignore unused vars in no-asserts builds
Jordan Rupprecht via llvm-commits
- [llvm] 094c0ec - Avoid fallthrough after ffb109b6852d248c9d2e3202477dccf20aac7151
Jordan Rupprecht via llvm-commits
- [llvm] 81896f8 - [NFC] Remove unused OrigLoopID vars
Jordan Rupprecht via llvm-commits
- [llvm] d295723 - [NFC] Remove unused var Op
Jordan Rupprecht via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Jordan Rupprecht via Phabricator via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Jordan Rupprecht via Phabricator via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Jordan Rupprecht via Phabricator via llvm-commits
- [PATCH] D137623: [Hexagon] Use default attributes for intrinsics
Jordan Rupprecht via Phabricator via llvm-commits
- [PATCH] D137623: [Hexagon] Use default attributes for intrinsics
Jordan Rupprecht via Phabricator via llvm-commits
- [PATCH] D137623: [Hexagon] Use default attributes for intrinsics
Jordan Rupprecht via Phabricator via llvm-commits
- [PATCH] D137623: [Hexagon] Use default attributes for intrinsics
Jordan Rupprecht via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D137154: Adding nvvm_reflect clang builtin
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D137154: Adding nvvm_reflect clang builtin
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D102107: [OpenMP] Codegen aggregate for outlined function captures
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D102107: [OpenMP] Codegen aggregate for outlined function captures
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D137893: [AsmWriter] Do not write a comma when varargs is the only argument
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D137893: [AsmWriter] Do not write a comma when varargs is the only argument
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D137893: [AsmWriter] Do not write a comma when varargs is the only argument
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
- [PATCH] D137338: Fix dupe word typos
Kadir Cetinkaya via Phabricator via llvm-commits
- [PATCH] D135847: [PowerPC] don't check CTR clobber in hardware loop insertion pass
Kai Luo via Phabricator via llvm-commits
- [PATCH] D137686: [X86] Add In64BitMode requirement for MMXRI
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D137204: [flang] Add check for constraints on event-stmts
Katherine Rasmussen via Phabricator via llvm-commits
- [PATCH] D137196: [flang] Add atomic_xor to list of intrinsics
Katherine Rasmussen via Phabricator via llvm-commits
- [PATCH] D137204: [flang] Add check for constraints on event-stmts
Katherine Rasmussen via Phabricator via llvm-commits
- [llvm] 378778a - [IR] Use llvm::any_of (NFC)
Kazu Hirata via llvm-commits
- [llvm] 16d969c - [PowerPC] Use ArrayRef (NFC)
Kazu Hirata via llvm-commits
- [llvm] d709888 - [Support] Use std::is_scalar_v (NFC)
Kazu Hirata via llvm-commits
- [llvm] 00d98e6 - [AArch64] RME MEC instructions and system registers
Keith Walker via llvm-commits
- [PATCH] D137431: [AArch64] RME MEC instructions and system registers
Keith Walker via Phabricator via llvm-commits
- [PATCH] D137431: [AArch64] RME MEC instructions and system registers
Keith Walker via Phabricator via llvm-commits
- [PATCH] D137431: [AArch64] RME MEC instructions and system registers
Keith Walker via Phabricator via llvm-commits
- [PATCH] D136867: [flang][OpenMP] Add parser support for Requires directive
Kiran Chandramohan via Phabricator via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pesudo for vector values.
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pesudo for vector values.
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D137427: [RISCV][Codegen] Account for LMUL in Vector Mask instructions
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D137808: [RISCV] Add OPCFG format and use it for vsetvli. NFC
Kito Cheng via Phabricator via llvm-commits
- [llvm] fd8ba4f - [release] Add third-party tarball to release for standalone builds
Konrad Kleine via llvm-commits
- [PATCH] D137777: [release] Add third-party tarball to release for standalone builds
Konrad Wilhelm Kleine via Phabricator via llvm-commits
- [PATCH] D137777: [release] Add third-party tarball to release for standalone builds
Konrad Wilhelm Kleine via Phabricator via llvm-commits
- [llvm] 6a88bce - Add deduction guides for IRBuilder
Krzysztof Parzyszek via llvm-commits
- [llvm] 0171862 - [Hexagon] Place aligned loads closer to users
Krzysztof Parzyszek via llvm-commits
- [llvm] a03e16a - [Hexagon] Improve idioms for fixed-point vector multiplication
Krzysztof Parzyszek via llvm-commits
- [llvm] 475d228 - [Hexagon] Reduce the spill alignment for double/quad vector classes
Krzysztof Parzyszek via llvm-commits
- [llvm] 110825b - [Hexagon] Remove unneeded HexagonRegisterInfo::getRARegister
Krzysztof Parzyszek via llvm-commits
- [llvm] 1a6d770 - [Hexagon] Pass Hexagon::PC to InitializeHexagonMCRegisterInfo
Krzysztof Parzyszek via llvm-commits
- [llvm] c0abd05 - [Hexagon] Use `Register` instead of `unsigned`, NFC
Krzysztof Parzyszek via llvm-commits
- [PATCH] D137173: Add deduction guides for IRBuilder
Krzysztof Parzyszek via Phabricator via llvm-commits
- [PATCH] D137173: Add deduction guides for IRBuilder
Krzysztof Parzyszek via Phabricator via llvm-commits
- [PATCH] D137173: Add deduction guides for IRBuilder
Krzysztof Parzyszek via Phabricator via llvm-commits
- [PATCH] D137173: Add deduction guides for IRBuilder
Krzysztof Parzyszek via Phabricator via llvm-commits
- [PATCH] D137173: Add deduction guides for IRBuilder
Krzysztof Parzyszek via Phabricator via llvm-commits
- [PATCH] D137623: [Hexagon] Use default attributes for intrinsics
Krzysztof Parzyszek via Phabricator via llvm-commits
- [PATCH] D137623: [Hexagon] Use default attributes for intrinsics
Krzysztof Parzyszek via Phabricator via llvm-commits
- [PATCH] D137623: [Hexagon] Use default attributes for intrinsics
Krzysztof Parzyszek via Phabricator via llvm-commits
- [PATCH] D137623: [Hexagon] Use default attributes for intrinsics
Krzysztof Parzyszek via Phabricator via llvm-commits
- [PATCH] D137292: [lsan] Fix stack buffer overwrite in SuspendedThreadsListMac::GetRegistersAndSP
Kuba (Brecka) Mracek via Phabricator via llvm-commits
- [PATCH] D137292: [lsan] Fix stack buffer overwrite in SuspendedThreadsListMac::GetRegistersAndSP
Kuba (Brecka) Mracek via Phabricator via llvm-commits
- [compiler-rt] 32bada2 - [lsan] Fix stack buffer overwrite in SuspendedThreadsListMac::GetRegistersAndSP
Kuba Mracek via llvm-commits
- [PATCH] D126250: [CodeGen][AArch64] Add support for LDAPR
Kyrill Tkachov via Phabricator via llvm-commits
- [PATCH] D137590: [CodeGen][AArch64] Enable LDAPR under +RCPC
Kyrill Tkachov via Phabricator via llvm-commits
- [PATCH] D136809: [CMake] Make sure all headers are installed into `CLANG_RESOURCE_DIR`
LJC via Phabricator via llvm-commits
- [PATCH] D136809: [CMake] Make sure all headers are installed into `CLANG_RESOURCE_DIR`
LJC via Phabricator via llvm-commits
- [llvm] ec9aae9 - [gn build] Port 428ac8f3a0f9
LLVM GN Syncbot via llvm-commits
- [llvm] f9256fc - [gn build] Port 135a9272a4c9
LLVM GN Syncbot via llvm-commits
- [llvm] baf4930 - [gn build] Port 85f08c4197ae
LLVM GN Syncbot via llvm-commits
- [llvm] c92ddf4 - [ORC] Add a unit test to verify that bound weak symbols can't be overridden.
Lang Hames via llvm-commits
- [llvm] d756603 - [ORC] Fix typo in unit test.
Lang Hames via llvm-commits
- [llvm] 5f479ee - [ORC] Capture JD by value in MachOPlatform::pushInitializersLoop.
Lang Hames via llvm-commits
- [compiler-rt] e770746 - [ORC-RT][MachO] Unlock JDStatesMutex during push-initializers to avoid deadlock.
Lang Hames via llvm-commits
- [PATCH] D136698: [SampleFDO] Persist profile staleness metrics into binary
Lei Wang via Phabricator via llvm-commits
- [PATCH] D136698: [SampleFDO] Persist profile staleness metrics into binary
Lei Wang via Phabricator via llvm-commits
- [PATCH] D136698: [SampleFDO] Persist profile staleness metrics into binary
Lei Wang via Phabricator via llvm-commits
- [compiler-rt] 40dffef - [compiler-rt][hwasan] Do not call InitLoadedGlobals in __hwasan_init
Leonard Chan via llvm-commits
- [compiler-rt] 7612e58 - [compiler-rt][hwasan] Call __hwasan_library_loaded via
Leonard Chan via llvm-commits
- [PATCH] D137676: [compiler-rt][hwasan] Do not call InitLoadedGlobals in __hwasan_init
Leonard Chan via Phabricator via llvm-commits
- [PATCH] D137676: [compiler-rt][hwasan] Do not call InitLoadedGlobals in __hwasan_init
Leonard Chan via Phabricator via llvm-commits
- [PATCH] D137492: [lld-macho] Ensure that chained fixups data comes first in __LINKEDIT
Leonard Grey via Phabricator via llvm-commits
- [PATCH] D137495: [LoongArch] Add GHC Calling Convention
Lin Runze via Phabricator via llvm-commits
- [PATCH] D137495: [LoongArch] Add GHC Calling Convention
Lin Runze via Phabricator via llvm-commits
- [PATCH] D137434: [lit] Add `target=<triple>` as a feature keyword
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D137724: [CMake] Warn when the version is older than 3.20.0.
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D136906: [Clang][LoongArch] Implement __builtin_loongarch_dbar builtin
Lu Weining via Phabricator via llvm-commits
- [PATCH] D137316: [Clang][LoongArch] Implement __builtin_loongarch_crc_w_d_w builtin and add diagnostics
Lu Weining via Phabricator via llvm-commits
- [PATCH] D136146: [Clang][LoongArch] Handle -march/-m{single,double,soft}-float/-mfpu options
Lu Weining via Phabricator via llvm-commits
- [PATCH] D137004: [LoongArch] Added spill/reload/copy support for CFRs
Lu Weining via Phabricator via llvm-commits
- [PATCH] D137387: [LoongArch] Override TargetFrameLowering::spillCalleeSavedRegisters
Lu Weining via Phabricator via llvm-commits
- [PATCH] D137393: [LoongArch] Moved expansion of PseudoCALL to LoongArchPreRAExpandPseudo pass
Lu Weining via Phabricator via llvm-commits
- [PATCH] D137394: [LoongArch] Generate PCALAU12I + JIRL instruction pair for medium codemodel
Lu Weining via Phabricator via llvm-commits
- [PATCH] D137311: [LoongArch] Expand atomicrmw fadd/fsub/fmin/fmax with CmpXChg
Lu Weining via Phabricator via llvm-commits
- [PATCH] D136906: [Clang][LoongArch] Implement __builtin_loongarch_dbar builtin
Lu Weining via Phabricator via llvm-commits
- [PATCH] D136146: [Clang][LoongArch] Handle -march/-m{single,double,soft}-float/-mfpu options
Lu Weining via Phabricator via llvm-commits
- [PATCH] D135751: [ADT][Triple] Add environment kinds for LoongArch GNU multiarch tuples
Lu Weining via Phabricator via llvm-commits
- [PATCH] D137628: [LoongArch] Implement MCTargetExpr::fixELFSymbolsInTLSFixups hook
Lu Weining via Phabricator via llvm-commits
- [PATCH] D137010: [libunwind][LoongArch] Add 64-bit LoongArch support
Lu Weining via Phabricator via llvm-commits
- [PATCH] D136146: [Clang][LoongArch] Handle -march/-m{single,double,soft}-float/-mfpu options
Lu Weining via Phabricator via llvm-commits
- [PATCH] D136215: [LoongArch] Add support for ISD::FRAMEADDR and ISD::RETURNADDR
Lu Weining via Phabricator via llvm-commits
- [PATCH] D137532: [LoongArch] Implement the TargetLowering::getRegisterByName hook
Lu Weining via Phabricator via llvm-commits
- [PATCH] D137532: [LoongArch] Implement the TargetLowering::getRegisterByName hook
Lu Weining via Phabricator via llvm-commits
- [PATCH] D137821: [LoongArch] Handle register spill in BranchRelaxation pass
Lu Weining via Phabricator via llvm-commits
- [PATCH] D137923: [X86][AMX] Fix the shape dependency issue.
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D137923: [X86][AMX] Fix the shape dependency issue.
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D132994: [RISC-V][HWASAN] Don't explicitly load GOT entry to call hwasan mismatch routine
Luís Marques via Phabricator via llvm-commits
- [PATCH] D136383: [PartialInlining] Enable recursive partial inlining.
Mark Lacey via Phabricator via llvm-commits
- [PATCH] D136383: [PartialInlining] Enable recursive partial inlining.
Mark Lacey via Phabricator via llvm-commits
- [PATCH] D136383: [PartialInlining] Enable recursive partial inlining.
Mark Lacey via Phabricator via llvm-commits
- [PATCH] D136383: [PartialInlining] Enable recursive partial inlining.
Mark Lacey via Phabricator via llvm-commits
- [PATCH] D137724: [CMake] Warn when the version is older than 3.20.0.
Mark de Wever via Phabricator via llvm-commits
- [PATCH] D137724: [CMake] Warn when the version is older than 3.20.0.
Mark de Wever via Phabricator via llvm-commits
- [PATCH] D137724: [CMake] Warn when the version is older than 3.20.0.
Mark de Wever via Phabricator via llvm-commits
- [lld] de4364f - [LLD][MinGW] Add --error-limit=<N> option
Martin Storsjö via llvm-commits
- [PATCH] D137489: [LLD][MinGW] Add --error-limit=<N> option
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D137669: clang/cmake: Require pre-built test dependencies for stand-alone builds
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D137669: clang/cmake: Require pre-built test dependencies for stand-alone builds
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D137529: [libunwind][NFC] FIx some typo in libunwind's debug string
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D137771: [lit] [Windows] Print exit codes > 255 as hex too
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D137489: [LLD][MinGW] Add --error-limit=<N> option
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D137669: clang/cmake: Require pre-built test dependencies for stand-alone builds
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D137788: [sanitizers] [windows] Correctly override functions with backward jmps
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D136992: [PowerPC] Add new load/store with length instructions to Future CPU.
Maryam Moghadas via Phabricator via llvm-commits
- [PATCH] D137483: [NFC][PowerPC] Add NFC fixes to PPCInstrinfo.cpp when getting the defined machine instruction.
Maryam Moghadas via Phabricator via llvm-commits
- [llvm] b9b74fc - InstCombine: Add baseline tests for fcmp and select on denormal range
Matt Arsenault via llvm-commits
- [llvm] 0f68ffe - InstCombine: Fold compare with smallest normal if input denormals are flushed
Matt Arsenault via llvm-commits
- [llvm] 1ce5f93 - InstSimplify: Add new baseline tests for fdiv
Matt Arsenault via llvm-commits
- [llvm] 7dd27a7 - InstSimplify: Fold fdiv nnan ninf x, 0 -> poison
Matt Arsenault via llvm-commits
- [llvm] 058f727 - InstCombine: Add baseline checks for fdiv
Matt Arsenault via llvm-commits
- [llvm] 583450f - AMDGPU: Fix DivergenceAnalysis for llvm.read_register
Matt Arsenault via llvm-commits
- [llvm] 4638ba7 - llvm-reduce: Try to turn calls into something else
Matt Arsenault via llvm-commits
- [llvm] e661185 - InstCombine: Fold fdiv nnan x, 0 -> copysign(inf, x)
Matt Arsenault via llvm-commits
- [llvm] 9fe5ca9 - AArch64/GlobalISel: Regenerate test checks
Matt Arsenault via llvm-commits
- [llvm] 1ab3d30 - AArch64/GlobalISel: Regenerate some test checks to include -NEXT
Matt Arsenault via llvm-commits
- [llvm] 8ea3cf4 - AMDGPU: Use generic is.fpclass enum instead of locally defined copy
Matt Arsenault via llvm-commits
- [llvm] 3cfa038 - AtomicExpand: Support cmpxchg expansion for small FP types
Matt Arsenault via llvm-commits
- [llvm] 3e4280c - AMDGPU: Disable some class simplifications for strictfp
Matt Arsenault via llvm-commits
- [llvm] 8ca7ed7 - llvm-reduce: Report number of new chunks
Matt Arsenault via llvm-commits
- [llvm] 89b7391 - llvm-reduce: Use DenseSet
Matt Arsenault via llvm-commits
- [llvm] ea48d25 - llvm-reduce: Minor code cleanups
Matt Arsenault via llvm-commits
- [llvm] 7c0362b - llvm-diff: Add failing testcase for issue 58629
Matt Arsenault via llvm-commits
- [llvm] ff2b60b - WebAssembly: Remove MachineFunction reference from MFI
Matt Arsenault via llvm-commits
- [llvm] 4f2f7e8 - Analysis: Reorder code in isDereferenceableAndAlignedPointer
Matt Arsenault via llvm-commits
- [llvm] a58541f - AMDGPU: Fold llvm.amdgcn.sqrt(undef)
Matt Arsenault via llvm-commits
- [llvm] 5247ae9 - AMDGPU: Switch some tests to generated checks
Matt Arsenault via llvm-commits
- [llvm] 0a376d1 - AMDGPU: Add some tests for i1 sitofp/uitofp-like selects
Matt Arsenault via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137444: InstCombine: Fold compare with smallest normal if input denormals are flushed
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D124195: [AMDGPU] Separate out SGPR spills to VGPR lanes during PEI
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137341: [VectorCombine] widen a load with subvector insert
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136069: [AMDGPU] Scheduler: Don't revert the schedule if the register pressure isn't changed for a region
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136096: InstSimplify: Fold fdiv nnan ninf x, 0 -> poison
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136098: InstCombine: Fold fdiv nnan x, 0 -> copysign(inf, x)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D134354: [AMDGPU][GlobalISel] Support mad/fma_mix selection
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137533: [AMDGPU] Merge GlobalISel tests into SelectionDAG tests. NFC.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy analysis to check scalar operands of buffer instructions use scalar registers.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137341: [VectorCombine] widen a load with subvector insert
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137341: [VectorCombine] widen a load with subvector insert
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137138: AMDGPU: Fix DivergenceAnalysis for llvm.read_register
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137574: PEI should be able to use backward walk in replaceFrameIndicesBackward.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137274: AMDGPU/GlobalISel: Fix combine crash because LI is not set in prelegalizer
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137341: [VectorCombine] widen a load with subvector insert
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137138: AMDGPU: Fix DivergenceAnalysis for llvm.read_register
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137361: IR: Add atomicrmw uinc_wrap and udec_wrap
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136560: llvm-reduce: Try to turn calls into something else
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136098: InstCombine: Fold fdiv nnan x, 0 -> copysign(inf, x)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D135447: [AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp class support and introduce GlobalISel implementation for AMDGPU
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137741: [PEI][NFC] Refactoring of the debug instructions frame index replacement
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137767: [AMDGPU] Add aperture register 64 bit variants
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum/fmaximum into fminnum/fmaxnum + NaN check
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum/fmaximum into fminnum/fmaxnum + NaN check
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum/fmaximum into fminnum/fmaxnum + NaN check
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136524: [InstCombine] Handle select inst when eliminating constant memcpy
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137574: PEI should be able to use backward walk in replaceFrameIndicesBackward.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D91086: AMDGPU: Document why we use (non-volatile) BUFFER_WBINVL1 in graphics
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D107639: [AMDGPU][GISel] Smaller code for scalar 32 to 64-bit extensions
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D63401: SROA: Simplify addrspacecasted allocas with volatile accesses
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D63401: SROA: Simplify addrspacecasted allocas with volatile accesses
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137811: InstCombine: Port amdgcn.class intrinsic combines to is.fpclass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D135447: [AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp class support and introduce GlobalISel implementation for AMDGPU
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D135447: [AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp class support and introduce GlobalISel implementation for AMDGPU
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137767: [AMDGPU] Add aperture register 64 bit variants
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137813: [RegAlloc Greedy]Account statepoints while splitting single basic block
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137813: [RegAlloc Greedy]Account statepoints while splitting single basic block
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137813: [RegAlloc Greedy]Account statepoints while splitting single basic block
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D134561: AtomicExpand: Support cmpxchg expansion for small FP types
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137811: InstCombine: Port amdgcn.class intrinsic combines to is.fpclass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137843: AMDGPU: Fold llvm.amdgcn.sqrt(undef)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137843: AMDGPU: Fold llvm.amdgcn.sqrt(undef)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D135447: [AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp class support and introduce GlobalISel implementation for AMDGPU
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D135633: [GlobalISel] Combine things like (z = x <= 0 ? z = x : z = 0) -> x & (x >> bw-1)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137843: AMDGPU: Fold llvm.amdgcn.sqrt(undef)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137811: InstCombine: Port amdgcn.class intrinsic combines to is.fpclass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D135447: [AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp class support and introduce GlobalISel implementation for AMDGPU
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137858: ConstantFolding: Constant fold some canonicalizes
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D37999: InstSimplify: Constant fold some canonicalizes
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137862: InstCombine: Fold some identities for canonicalize
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137863: llvm-reduce: Use DenseSet
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137863: llvm-reduce: Use DenseSet
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137295: WebAssembly: Remove MachineFunction reference from MFI
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum/fmaximum into fminnum/fmaxnum + NaN check
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum/fmaximum into fminnum/fmaxnum + NaN check
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D134223: Analysis: Add AssumptionCache to isSafeToSpeculativelyExecute
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137295: WebAssembly: Remove MachineFunction reference from MFI
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D80249: CodeGen: Don't lazily construct MachineFunctionInfo
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137125: PPC: Implement null target streamer
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137122: VE: Register null MCTargetStreamer
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137843: AMDGPU: Fold llvm.amdgcn.sqrt(undef)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137892: [AMDGPU] Remove the assertion for MUBUF instruction with voffset
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D6970: R600/SI: Try to form (f64 [s|u]int_to_fp i1)
Matt Arsenault via Phabricator via llvm-commits
- [llvm] a8c24d5 - [InstCombine] Remove redundant splats in InstCombineVectorOps
Matt Devereau via llvm-commits
- [llvm] bd27ac4 - Precommit for redundant and after SVE load
Matt Devereau via llvm-commits
- [PATCH] D135876: [InstCombine] Remove redundant splats in InstCombineVectorOps
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D135876: [InstCombine] Remove redundant splats in InstCombineVectorOps
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D135876: [InstCombine] Remove redundant splats in InstCombineVectorOps
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D135876: [InstCombine] Remove redundant splats in InstCombineVectorOps
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D133116: [AArch64][SVE] Optimise repeated floating-point complex patterns to splat
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D133116: [AArch64][SVE] Optimise repeated floating-point complex patterns to splat
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D136483: [mlir][MemRefToLLVM] Reuse existing lowering for collaspe/expand_shape
Matthias Springer via Phabricator via llvm-commits
- [PATCH] D136483: [mlir][MemRefToLLVM] Reuse existing lowering for collaspe/expand_shape
Matthias Springer via Phabricator via llvm-commits
- [PATCH] D136483: [mlir][MemRefToLLVM] Reuse existing lowering for collaspe/expand_shape
Matthias Springer via Phabricator via llvm-commits
- [PATCH] D137632: [LoopPredication] Widen checks if condition operands constant ranges are known
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D136827: [JT][CT] Preserve exisiting BPI/BFI during JumpThreading
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D136827: [JT][CT] Preserve exisiting BPI/BFI during JumpThreading
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D137505: [SCEV] Cache ZExt SCEV expressions.
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D137588: [ScalarEvolution] Skip values from unreachable bbs for phi ranges.
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D137822: [IRCE] Bail out if Start AddRec is for another loop
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D137822: [IRCE] Bail out if Start AddRec is for another loop
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D123481: Do not build with Werror by default (Bazel build)
Mehdi AMINI via Phabricator via llvm-commits
- [PATCH] D137861: [MLIR] Move JitRunner Options to header, pass to mlirTransformer
Mehdi AMINI via Phabricator via llvm-commits
- [PATCH] D137461: [LoopInterchange] Refactor and rewrite validDepInterchange()
MengXuan Cai via Phabricator via llvm-commits
- [PATCH] D137461: [LoopInterchange] Refactor and rewrite validDepInterchange()
MengXuan Cai via Phabricator via llvm-commits
- [PATCH] D137672: [LoopFuse] fix issue 58775
MengXuan Cai via Phabricator via llvm-commits
- [PATCH] D137672: [LoopFuse] Ensure inner loops are in loop simplified form under new PM
MengXuan Cai via Phabricator via llvm-commits
- [PATCH] D137672: [LoopFuse] Ensure inner loops are in loop simplified form under new PM
MengXuan Cai via Phabricator via llvm-commits
- [PATCH] D137672: [LoopFuse] Ensure inner loops are in loop simplified form under new PM
MengXuan Cai via Phabricator via llvm-commits
- [PATCH] D136415: [LSR] Check if terminating value is safe to expand before transformation
Michael Kruse via Phabricator via llvm-commits
- [PATCH] D115218: [CodeExtractor] Refactor extractCodeRegion, fix parameter index confusion.
Michael Kruse via Phabricator via llvm-commits
- [PATCH] D115218: [CodeExtractor] Refactor extractCodeRegion, fix parameter index confusion.
Michael Kruse via Phabricator via llvm-commits
- [PATCH] D115218: [CodeExtractor] Refactor extractCodeRegion, fix parameter index confusion.
Michael Kruse via Phabricator via llvm-commits
- [PATCH] D137461: [LoopInterchange] Refactor and rewrite validDepInterchange()
Michael Kruse via Phabricator via llvm-commits
- [PATCH] D137440: [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D137439: [RISCV] Remove some unneeded widening FP vector pseudo instructions. NFC
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D137440: [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D137440: [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV
Michael Maitland via Phabricator via llvm-commits
- [llvm] f6f1fd4 - Revert "[InstCombine] allow more folds more multi-use selects"
Michał Górny via llvm-commits
- [PATCH] D137555: [cmake] Add missing CMakePushCheckState include to FindLibEdit.cmake
Michał Górny via Phabricator via llvm-commits
- [PATCH] D137555: [cmake] Add missing CMakePushCheckState include to FindLibEdit.cmake
Michał Górny via Phabricator via llvm-commits
- [PATCH] D137555: [cmake] Add missing CMakePushCheckState include to FindLibEdit.cmake
Michał Górny via Phabricator via llvm-commits
- [PATCH] D137669: clang/cmake: Require pre-built test dependencies for stand-alone builds
Michał Górny via Phabricator via llvm-commits
- [PATCH] D137669: clang/cmake: Require pre-built test dependencies for stand-alone builds
Michał Górny via Phabricator via llvm-commits
- [PATCH] D137035: [llvm] [cmake] Set EXCLUDE_FROM_ALL on gtest and TestingSupport
Michał Górny via Phabricator via llvm-commits
- [PATCH] D137724: [CMake] Warn when the version is older than 3.20.0.
Michał Górny via Phabricator via llvm-commits
- [PATCH] D123968: docs: Add instructions for stand-alone builds of clang
Michał Górny via Phabricator via llvm-commits
- [PATCH] D137854: libclc: Use cmake files instead of llvm-config
Michał Górny via Phabricator via llvm-commits
- [PATCH] D137164: [LLParser] Handle mixed blockaddress forward references with names and IDs
Michiel Derhaeg via Phabricator via llvm-commits
- [PATCH] D71539: [SCEV] Look through trivial PHIs.
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D137672: [LoopFuse] Ensure inner loops are in loop simplified form under new PM
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D137672: [LoopFuse] Ensure inner loops are in loop simplified form under new PM
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D137422: [DAGCombine] Generalize foldSelectCCToShiftAnd
Mikhail Gudim via Phabricator via llvm-commits
- [PATCH] D137422: [DAGCombine] Generalize foldSelectCCToShiftAnd
Mikhail Gudim via Phabricator via llvm-commits
- [PATCH] D137422: [DAGCombine] Generalize foldSelectCCToShiftAnd
Mikhail Gudim via Phabricator via llvm-commits
- [PATCH] D137440: [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV
Min-Yih Hsu via Phabricator via llvm-commits
- [PATCH] D137425: [M68k] Add predicates `AtLeastM680x0`
Min-Yih Hsu via Phabricator via llvm-commits
- [PATCH] D136525: [M68k] Add codegen pattern for atomic load / store
Min-Yih Hsu via Phabricator via llvm-commits
- [PATCH] D137440: [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV
Min-Yih Hsu via Phabricator via llvm-commits
- [PATCH] D137902: [M68k][MC] Make immediate operands relocatable
Min-Yih Hsu via Phabricator via llvm-commits
- [llvm] 36e8e19 - [NFC][BlockPlacement]Add an option to renumber blocks based on function layout order.
Mingming Liu via llvm-commits
- [llvm] e4e7bde - [AArch64]Combine BFXIL to ORR with right shift for ISD::OR instruction selection
Mingming Liu via llvm-commits
- [llvm] 78eead2 - [NFC][AArch64]Call encoding functions for left-shift immediate (which is no-op in terms of value but better code style)
Mingming Liu via llvm-commits
- [llvm] 3acbadd - [NFC][AArch64]Precommit test cases to show ORR is better when one operand is a shift of the other operand
Mingming Liu via llvm-commits
- [llvm] 0f9ef8b - [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand
Mingming Liu via llvm-commits
- [PATCH] D137467: [NFC][BlockPlacement]Add an option to renumber blocks based on function layout order.
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137467: [NFC][BlockPlacement]Add an option to renumber blocks based on function layout order.
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137465: [AArch64]Combine BFXIL to ORR with right shift for ISD::OR instruction selection
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137465: [AArch64]Combine BFXIL to ORR with right shift for ISD::OR instruction selection
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137465: [AArch64]Combine BFXIL to ORR with right shift for ISD::OR instruction selection
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D135059: [NFC][AArch64] Precommit test cases; in one test case, BFI is indeed better while in the other test case ORR is better
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D135059: [NFC][AArch64] Precommit test cases; in one test case, BFI is indeed better while in the other test case ORR is better
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137689: [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137689: [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D135844: [AArch64][2/4]Regard (shl val, N) as a potential bit-field-positioning op regardless of the number of uses.
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137797: [NFC][AArch64]Call encoding functions for left-shift immediate (which is no-op in terms of value but better code style)
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137689: [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137689: [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137797: [NFC][AArch64]Call encoding functions for left-shift immediate (which is no-op in terms of value but better code style)
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137797: [NFC][AArch64]Call encoding functions for left-shift immediate (which is no-op in terms of value but better code style)
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137689: [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137689: [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D137689: [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D135059: [NFC][AArch64] Precommit test cases; in one test case, BFI is indeed better while in the other test case ORR is better
Mingming Liu via Phabricator via llvm-commits
- [llvm] 5617fb1 - [MLGO][NFC] Use std::map instead of DenseMap to avoid use after free
Mircea Trofin via llvm-commits
- [llvm] fdf2259 - [NFC] Comment in MLInlineAdvisor as to why use std::map for FPICache
Mircea Trofin via llvm-commits
- [PATCH] D137446: [RISCV] Rework isAllUsesReadW in RISCVSExtWRemoval. NFCI
Mohammed Nurul Hoque via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D136722: [AArch64] Extending lowering of 'zext <Y x i8> %x to <Y x i8X>' to use tbl instructions
NILANJANA BASU via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Nathan Chancellor via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Nathan Chancellor via Phabricator via llvm-commits
- [llvm] 1834a31 - [llvm][NFC] Use c++17 style variable type traits
Nathan James via llvm-commits
- [llvm] 632a389 - Revert "[llvm][NFC] Use c++17 style variable type traits"
Nathan James via llvm-commits
- [llvm] 6aa050a - Reland "[llvm][NFC] Use c++17 style variable type traits"
Nathan James via llvm-commits
- [PATCH] D137493: [llvm][NFC] Use c++17 style variable type traits
Nathan James via Phabricator via llvm-commits
- [PATCH] D137599: [libunwind][PowerPC] Fix saving/restoring VSX registers on LE systems
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D114174: [ARM][CodeGen] Add support for complex deinterleaving
Nicholas Guy via Phabricator via llvm-commits
- [PATCH] D114174: [ARM][CodeGen] Add support for complex deinterleaving
Nicholas Guy via Phabricator via llvm-commits
- [PATCH] D129066: [AArch64][CodeGen] Add AArch64 support for complex deinterleaving
Nicholas Guy via Phabricator via llvm-commits
- [PATCH] D114174: [ARM][CodeGen] Add support for complex deinterleaving
Nicholas Guy via Phabricator via llvm-commits
- [llvm] 6a8d894 - [CodeGen][Test] simplify callbr-asm-outputs.ll with nounwind NFC
Nick Desaulniers via llvm-commits
- [llvm] f2981a3 - [SelectDagISEL] refactor HandlePHINodesInSuccessorBlocks NFC.
Nick Desaulniers via llvm-commits
- [PATCH] D136014: Recommit [AArch64] Improve codegen for shifted mask op
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D137596: [CodeGen][Test] simplify callbr-asm-outputs.ll with nounwind NFC
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D137707: [WIP] Move "auto-init" instructions to the dominator of their users
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D137596: [CodeGen][Test] simplify callbr-asm-outputs.ll with nounwind NFC
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D137445: [SelectDagISEL] refactor HandlePHINodesInSuccessorBlocks NFC.
Nick Desaulniers via Phabricator via llvm-commits
- [llvm] ce2474f - [gn build] port a11cd0d94ed3 (gtest llvm/utils/unittest -> third-party/unittest)
Nico Weber via llvm-commits
- [llvm] c3c94a8 - [gn build] port b60f801607543
Nico Weber via llvm-commits
- [llvm] 369237a - [gn build] port e1b88c8a09be (clang resource dir uses only major version)
Nico Weber via llvm-commits
- [llvm] 6e8f8b1 - [gn build] Extract gen_arch_intrinsics() template to remove some duplication
Nico Weber via llvm-commits
- [PATCH] D137338: Fix dupe word typos
Nico Weber via Phabricator via llvm-commits
- [PATCH] D137368: [lld-macho] Overhaul map file code
Nico Weber via Phabricator via llvm-commits
- [PATCH] D137368: [lld-macho] Overhaul map file code
Nico Weber via Phabricator via llvm-commits
- [PATCH] D137723: [PDB] Don't include input files in the 'cmd' entry of S_ENVBLOCK
Nico Weber via Phabricator via llvm-commits
- [PATCH] D137784: [gn build] Extract gen_arch_intrinsics() template to remove some duplication
Nico Weber via Phabricator via llvm-commits
- [PATCH] D137723: [PDB] Don't include input files in the 'cmd' entry of S_ENVBLOCK
Nico Weber via Phabricator via llvm-commits
- [PATCH] D137838: [RFC][Support] Move TargetParsers to new component
Nico Weber via Phabricator via llvm-commits
- [PATCH] D137784: [gn build] Extract gen_arch_intrinsics() template to remove some duplication
Nico Weber via Phabricator via llvm-commits
- [PATCH] D136771: [AArch64] Canonicalize SIGN_EXTEND to VSELECT
Nicola Lancellotti via Phabricator via llvm-commits
- [PATCH] D135736: [mlir][MemRef] Make reinterpret_cast(extract_strided_metadata) more robust
Nicolas Vasilache via Phabricator via llvm-commits
- [llvm] 9a45e4b - [MemCpyOpt] Move lifetime marker before call to enable call slot optimization
Nikita Popov via llvm-commits
- [llvm] a50c269 - [InstCombine] Handle load smaller than one byte in memset forward
Nikita Popov via llvm-commits
- [llvm] d35fcf0 - [WebAssembly] Use default attributes for intrinsics
Nikita Popov via llvm-commits
- [llvm] 3705e03 - [X86] Use default attributes for even more intrinsics
Nikita Popov via llvm-commits
- [llvm] 3ddf56f - [Statepoint] Use default attributes for some GC intrinsics
Nikita Popov via llvm-commits
- [llvm] ce2f9ba - [SCCP] Add helper for getting constant range (NFC)
Nikita Popov via llvm-commits
- [llvm] c412a2e - [SCCP] Add tests for with.overflow intrinsics (NFC)
Nikita Popov via llvm-commits
- [llvm] 8a8983b - [Hexagon] Use default attributes for intrinsics
Nikita Popov via llvm-commits
- [llvm] 4d33cf4 - [MemCpyOpt] Avoid moving lifetime marker above def (PR58903)
Nikita Popov via llvm-commits
- [PATCH] D137406: [X86] Add missing `IntrArgMemOnly` for intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D136929: [Statepoint] Use default attributes for some GC intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D135886: [MemCpyOpt] Move lifetime marker before call to enable call slot optimization
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137083: [ObjCARC] Replace parts of ObjCARCAA with intrinsic attributes
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D136929: [Statepoint] Use default attributes for some GC intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137173: Add deduction guides for IRBuilder
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137551: [WebAssembly] Use default attributes for intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137552: [X86] Use default attributes for even more intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137551: [WebAssembly] Use default attributes for intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137551: [WebAssembly] Use default attributes for intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137551: [WebAssembly] Use default attributes for intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137557: [PtrAuth] Use default attributes for some ptrauth intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137552: [X86] Use default attributes for even more intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D136929: [Statepoint] Use default attributes for some GC intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137623: [Hexagon] Use default attributes for intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137626: [test] Avoid legacy PM default pipelines (O0, O1 etc) when running opt
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137629: [PowerPC] Use default attributes for intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137630: [IR] Don't assume readnone/readonly intrinsics are willreturn
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137630: [IR] Don't assume readnone/readonly intrinsics are willreturn
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137641: [TableGen] Use MemoryEffects to represent intrinsic memory effects (NFCI)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137553: [MemorySSA] Delete dead MemoryUseOrDef for CallInst when clone loop basicblock
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget SCEV block and loop dispositions for removed incomming values of phi
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip token-producing Instructions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137553: [MemorySSA] Delete dead MemoryUseOrDef for CallInst when clone loop basicblock
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget all block and loop dispositions after flatten
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip token-producing Instructions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137713: [SCCP] Add support for with.overflow intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum and fmaximum into a pair of selects
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137758: [HardwareLoops] remove loops which has undef count
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137623: [Hexagon] Use default attributes for intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137655: Expand fminimum/fmaximum into fminnum/fmaxnum + NaN check
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137758: [HardwareLoops] remove loops which has undef count
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137629: [PowerPC] Use default attributes for intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137629: [PowerPC] Use default attributes for intrinsics
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137641: [TableGen] Use MemoryEffects to represent intrinsic memory effects (NFCI)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip token-producing Instructions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137840: [ConstraintElimination] Dummy revision for review
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137847: [ConstraintElimination] Make decompose() infallible
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137847: [ConstraintElimination] Make decompose() infallible
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137848: [ConstraintElimination] Add Decomposition class (NFCI)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137848: [ConstraintElimination] Add Decomposition class (NFCI)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D133036: [InstCombine] Treat passing undef to noundef params as UB
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D136827: [JT][CT] Preserve exisiting BPI/BFI during JumpThreading
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip non-sized Instructions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D132222: [Assignment Tracking][3/*] Add DIAssignID metadata boilerplate
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D132223: [Assignment Tracking][4/*] Add llvm.dbg.assign intrinsic boilerplate
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D132223: [Assignment Tracking][4/*] Add llvm.dbg.assign intrinsic boilerplate
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D132224: [Assignment Tracking][5/*] Add core infrastructure for instruction reference
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D133576: [Assignment Tracking][5.1/*] Add deleteAssignmentMarkers function
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D136173: [DebugInfo] Add function to test debug values for equivalence
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D133576: [Assignment Tracking][5.1/*] Add deleteAssignmentMarkers function
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D132357: [NFC] Move getDebugValueLoc from static in Local.cpp to DebugInfo.h
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D132224: [Assignment Tracking][5/*] Add core infrastructure for instruction reference
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D132224: [Assignment Tracking][5/*] Add core infrastructure for instruction reference
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D133576: [Assignment Tracking][5.1/*] Add deleteAssignmentMarkers function
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D132224: [Assignment Tracking][5/*] Add core infrastructure for instruction reference
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D132225: [Assignment Tracking][6/*] Add trackAssignments function
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D133291: [Assignment Tracking][8/*] Add DIAssignID merging utilities
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D133292: [Assignment Tracking][9/*] Don't drop DIAssignID in dropUnknownNonDebugMetadata
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D133293: [Assignment Tracking][10/*] salvageDebugInfo for dbg.assign intrinsics
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D133294: [Assignment Tracking][11/*] Update RemoveRedundantDbgInstrs
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D137497: [ArgumentPromotion] Allow the frontend to specify the maximum number of elements to promote on a per-function basis via metadata.
Patrick Walton via Phabricator via llvm-commits
- [PATCH] D137576: [pgo] Improve check for enablesValueProfiling
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D137434: [lit] Add `target=<triple>` as a feature keyword
Paul Robinson via Phabricator via llvm-commits
- [PATCH] D137434: [lit] Add `target=<triple>` as a feature keyword
Paul Robinson via Phabricator via llvm-commits
- [PATCH] D137434: [lit] Add `target=<triple>` as a feature keyword
Paul Robinson via Phabricator via llvm-commits
- [PATCH] D137434: [lit] Add `target=<triple>` as a feature keyword
Paul Robinson via Phabricator via llvm-commits
- [PATCH] D134195: [PowerPC] XCOFF exception section support on the integrated assembler path
Paul Scoropan via Phabricator via llvm-commits
- [PATCH] D134195: [PowerPC] XCOFF exception section support on the integrated assembler path
Paul Scoropan via Phabricator via llvm-commits
- [llvm] df8e0ce - [SVE] Extend getMemVTFromNode to cover the sret variants of sve.ld2/3/4.
Paul Walker via llvm-commits
- [PATCH] D137419: [AArch64][SVE2] Add the SVE2.1 FP quadword reduction instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137411: [AArch64][SVE2] Add the SVE2.1 logical quadword reduction instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137245: [AArch64][SVE2] Add the SVE2.1 quadword variants of ld1w/ld1d/st1w/st1d
Paul Walker via Phabricator via llvm-commits
- [PATCH] D136771: [AArch64] Canonicalize SIGN_EXTEND to VSELECT
Paul Walker via Phabricator via llvm-commits
- [PATCH] D136142: [AArch64]SME2 MOV Instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137547: [AArch64][SVE] Use PTRUE instruction for get_active_lane_mask intrinsic if the range is from 0 to SVE predicator constant
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137554: [AArch64][SVE2] Add the SVE2.1 quadword structured load/store instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137561: [AArch64][SVE2] Add the SVE2.1 pmov instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137568: [AArch64][SVE2] Add the SVE2.1 dupq and extq instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D136172: [AArch64]SME2 Multi vector Sel Load and Store instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D136172: [AArch64]SME2 Multi vector Sel Load and Store instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137554: [AArch64][SVE2] Add the SVE2.1 quadword structured load/store instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137554: [AArch64][SVE2] Add the SVE2.1 quadword structured load/store instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137625: [AArch64][SVE2] Add the SVE2.1 tbxq instruction
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly
Paul Walker via Phabricator via llvm-commits
- [PATCH] D132392: [SVE] Extend getMemVTFromNode to cover the sret variants of sve.ld2/3/4.
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137625: [AArch64][SVE2] Add the SVE2.1 tbxq instruction
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137619: [AArch64][SVE2] Add the SVE2.1 permute vector elements (quadword) instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137411: [AArch64][SVE2] Add the SVE2.1 integer quadword reduction instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D136172: [AArch64]SME2 Multi vector Sel Load and Store instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D124325: [AArch64][SVE] Support logical operation BIC with DestructiveBinary patterns
Paul Walker via Phabricator via llvm-commits
- [PATCH] D136172: [AArch64]SME2 Multi vector Sel Load and Store instructions
Paul Walker via Phabricator via llvm-commits
- [PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly
Paul Walker via Phabricator via llvm-commits
- [llvm] b293de9 - [Docs] Add my Office Hours
Paulo Matos via llvm-commits
- [PATCH] D112201: [CortexA55][SchedModels] Complete Cortex-A55 scheduler model
Pavel Kosov via Phabricator via llvm-commits
- [llvm] 838d5d3 - AMDGPU/GlobalISel: Fix combine crash because LI is not set in prelegalizer
Petar Avramovic via llvm-commits
- [PATCH] D137274: AMDGPU/GlobalISel: Fix combine crash because LI is not set in prelegalizer
Petar Avramovic via Phabricator via llvm-commits
- [PATCH] D137204: [flang] Add check for constraints on event-stmts
Pete Steinfeld via Phabricator via llvm-commits
- [PATCH] D137352: [scudo] Detect double free when running with MTE.
Peter Collingbourne via Phabricator via llvm-commits
- [PATCH] D137354: [scudo] Extend basic test to cover zero size allocs.
Peter Collingbourne via Phabricator via llvm-commits
- [PATCH] D137433: [AArch64][CodeGen] Remove redundant vector negations before concat
Peter Waller via Phabricator via llvm-commits
- [PATCH] D137547: [AArch64][SVE] Use PTRUE instruction for get_active_lane_mask intrinsic if the range is from 0 to SVE predicator constant
Peter Waller via Phabricator via llvm-commits
- [PATCH] D137547: [AArch64][SVE] Use PTRUE instruction for get_active_lane_mask intrinsic if the range is from 0 to SVE predicator constant
Peter Waller via Phabricator via llvm-commits
- [PATCH] D137547: [AArch64][SVE] Use PTRUE instruction for get_active_lane_mask intrinsic if the range is from 0 to SVE predicator constant
Peter Waller via Phabricator via llvm-commits
- [PATCH] D133116: [AArch64][SVE] Optimise repeated floating-point complex patterns to splat
Peter Waller via Phabricator via llvm-commits
- [PATCH] D133116: [AArch64][SVE] Optimise repeated floating-point complex patterns to splat
Peter Waller via Phabricator via llvm-commits
- [PATCH] D137473: [vfs] Allow root paths relative to the directory of the vfsoverlay YAML file
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D137724: [CMake] Warn when the version is older than 3.20.0.
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D137799: [WIP][llvm-driver] Pass extra arguments to tools
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D137799: [WIP][llvm-driver] Pass extra arguments to tools
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D137741: [PEI][NFC] Refactoring of the debug instructions frame index replacement
Phabricator via llvm-commits
- [PATCH] D137093: [AArch64][SVE][NFC] Add streaming mode SVE tests
Phabricator via llvm-commits
- [llvm] b505fd5 - [SLP]Redesign vectorization of the gather nodes.
Philip Reames via llvm-commits
- [llvm] deeaec7 - Add a const version of SDUse::getUser [nfc]
Philip Reames via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137593: [RISCV] Optimize scalable frame setup when VLEN is precisely known
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137699: [RISCV] Don't use zero-stride vector load if there's no optimized u-arch
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137694: [RISCV] Add OPCFG format of vector
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137440: [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137694: [RISCV] Add OPCFG format of vector
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137694: [RISCV] Add OPCFG format of vector
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137530: [RISCV] Splat scalar to be of length VL instead of 1 for reductions
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137699: [RISCV] Don't use zero-stride vector load if there's no optimized u-arch
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137856: [RISCV] Reduce VL of splat instructions used to feed stores
Philip Reames via Phabricator via llvm-commits
- [PATCH] D130895: [RISCV] Make VL choosing for a splat-like VMV based on its users
Philip Reames via Phabricator via llvm-commits
- [llvm] d917656 - [X86] Add missing `IntrArgMemOnly` for intrinsics
Phoebe Wang via llvm-commits
- [PATCH] D137406: [X86] Add missing `IntrArgMemOnly` for intrinsics
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D137552: [X86] Use default attributes for even more intrinsics
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D102817: [Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D137608: [X86] Add In64BitMode predicates for LOCK_INC64m, LOCK_DEC64m
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D136443: X86: use soft-float ABI for fp16 libcalls on Darwin
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D102817: [Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D130718: [compiler-rt] [builtins] Detect _Float16 support at compile time
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D137711: [X86] Use lock add/sub for cases that we only care about the EFLAGS
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D137711: [X86] Use lock add/sub for cases that we only care about the EFLAGS
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D137711: [X86] Use lock add/sub for cases that we only care about the EFLAGS
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D130718: [compiler-rt] [builtins] Detect _Float16 support at compile time
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D102817: [Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D102817: [Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D137026: [X86] Use GFNI for vXi8 shifts/rotates
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D137026: [X86] Use GFNI for vXi8 shifts/rotates
Phoebe Wang via Phabricator via llvm-commits
- [llvm] 70c781f - [SIFoldOperands] Move `isFoldableCopy` into a separate helper, NFC.
Pierre van Houtryve via llvm-commits
- [llvm] b5f9972 - [SIFoldOperands] Small code cleanups, NFC.
Pierre van Houtryve via llvm-commits
- [llvm] 7425077 - [AMDGPU] Add & use `hasNamedOperand`, NFC
Pierre van Houtryve via llvm-commits
- [llvm] 767999f - [AMDGPU][GlobalISel] Support mad/fma_mix selection
Pierre van Houtryve via llvm-commits
- [PATCH] D137538: [SIFoldOperands] Move `isFoldableCopy` into a separate helper, NFC.
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137539: [SIFoldOperands] Small code cleanups, NFC.
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137540: [AMDGPU] Add & use `hasNamedOperand`, NFC
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137540: [AMDGPU] Add & use `hasNamedOperand`, NFC
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137538: [SIFoldOperands] Move `isFoldableCopy` into a separate helper, NFC.
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137538: [SIFoldOperands] Move `isFoldableCopy` into a separate helper, NFC.
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137539: [SIFoldOperands] Small code cleanups, NFC.
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137540: [AMDGPU] Add & use `hasNamedOperand`, NFC
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D134354: [AMDGPU][GlobalISel] Support mad/fma_mix selection
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137705: [AMDGPU] Add DAG Combine for right-shift carry add to uaddo
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137705: [AMDGPU] Add DAG Combine for right-shift carry add to uaddo
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137705: [AMDGPU] Add DAG Combine for right-shift carry add to uaddo
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137705: [AMDGPU] Add DAG Combine for right-shift carry add to uaddo
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137767: [AMDGPU] Add aperture register 64 bit variants
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137542: [AMDGPU] Use aperture registers instead of S_GETREG
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137767: [AMDGPU] Add aperture register 64 bit variants
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D137864: [Support] Use thread safe version of getpwuid and getpwnam.
Pirama Arumuga Nainar via Phabricator via llvm-commits
- [PATCH] D129735: [WIP][RISCV] Add new pass to transform undef to pesudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D129735: [WIP][RISCV] Add new pass to transform undef to pesudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D137763: [RISCV] precommit test for D129735
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pesudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pesudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D137763: [RISCV] precommit test for D129735
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D129735: [RISCV] Add new pass to transform undef to pesudo for vector values.
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D136483: [mlir][MemRefToLLVM] Reuse existing lowering for collaspe/expand_shape
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D137616: [BOLT][NFC] Fix possible use-after-free
Rafael Auler via Phabricator via llvm-commits
- [PATCH] D136237: [BasicBlockSections] avoid insertting redundant branch to fall through blocks
Rahman Lavaee via Phabricator via llvm-commits
- [PATCH] D137535: [CodeGen][BasicBlockSections] Fix wrong alignment directive placement in basic block section cases
Rahman Lavaee via Phabricator via llvm-commits
- [PATCH] D135808: [LoopInterchange] Correcting the profitability checking for vectorization
Ramkrishnan Narayanan Komala via Phabricator via llvm-commits
- [PATCH] D135808: [LoopInterchange] Correcting the profitability checking for vectorization
Ramkrishnan Narayanan Komala via Phabricator via llvm-commits
- [PATCH] D135808: [LoopInterchange] Correcting the profitability checking for vectorization
Ramkrishnan Narayanan Komala via Phabricator via llvm-commits
- [PATCH] D135808: [LoopInterchange] Correcting the profitability checking for vectorization
Ramkrishnan Narayanan Komala via Phabricator via llvm-commits
- [PATCH] D137760: Add FP8 E4M3 support to APFloat.
Reed Wanderman-Milne via Phabricator via llvm-commits
- [PATCH] D137861: [MLIR] Move JitRunner Options to header, pass to mlirTransformer
Renato Golin via Phabricator via llvm-commits
- [PATCH] D137861: [MLIR] Move JitRunner Options to header, pass to mlirTransformer
Renato Golin via Phabricator via llvm-commits
- [PATCH] D137861: [MLIR] Move JitRunner Options to header, pass to mlirTransformer
Renato Golin via Phabricator via llvm-commits
- [PATCH] D137861: [MLIR] Move JitRunner Options to header, pass to mlirTransformer
Renato Golin via Phabricator via llvm-commits
- [llvm] 46fab76 - [MemoryBuffer] Allow optionally specifying desired buffer alignment
River Riddle via llvm-commits
- [PATCH] D137820: [MemoryBuffer] Allow optionally specifying desired buffer alignment
River Riddle via Phabricator via llvm-commits
- [PATCH] D137820: [MemoryBuffer] Allow optionally specifying desired buffer alignment
River Riddle via Phabricator via llvm-commits
- [PATCH] D137820: [MemoryBuffer] Allow optionally specifying desired buffer alignment
River Riddle via Phabricator via llvm-commits
- [PATCH] D137369: [lld-macho] Emit map file entry for compact unwind info
Roger Kim via Phabricator via llvm-commits
- [PATCH] D137368: [lld-macho] Overhaul map file code
Roger Kim via Phabricator via llvm-commits
- [PATCH] D137423: [PowerPC][WIP] make expensive mflr be awfy from its user in the function prologue
Roland Froese via Phabricator via llvm-commits
- [PATCH] D137612: [PowerPC] add a new subtarget feature CheapMFLR
Roland Froese via Phabricator via llvm-commits
- [PATCH] D137612: [PowerPC] add a new subtarget feature FastMFLR
Roland Froese via Phabricator via llvm-commits
- [PATCH] D137676: [compiler-rt][hwasan] Do not call InitLoadedGlobals in __hwasan_init
Roland McGrath via Phabricator via llvm-commits
- [PATCH] D136806: [Pipelines] Introduce SROA after (full) loop unrolling
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D137497: [ArgumentPromotion] Allow the frontend to specify the maximum number of elements to promote on a per-function basis via metadata.
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D115713: [LV] Don't apply "TinyTripCountVectorThreshold" for loops with compile time known TC.
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D137707: [WIP] Move "auto-init" instructions to the dominator of their users
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D137913: [X86] Rewrite `getScalarizationOverhead()`
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D137913: [X86] Rewrite `getScalarizationOverhead()`
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D137913: [X86] Rewrite `getScalarizationOverhead()`
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D137913: [X86] Rewrite `getScalarizationOverhead()`
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D137165: [JumpThreading] Copy profile metadata on select unfolding
Roman Paukner via Phabricator via llvm-commits
- [PATCH] D137165: [JumpThreading] Copy profile metadata on select unfolding
Roman Paukner via Phabricator via llvm-commits
- [PATCH] D137165: [JumpThreading] Copy profile metadata on select unfolding
Roman Paukner via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Ron Lieberman via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Ron Lieberman via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Ron Lieberman via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Ron Lieberman via Phabricator via llvm-commits
- [PATCH] D135402: [LLD] Enable --no-undefined-version by default.
Ron Lieberman via Phabricator via llvm-commits
- [PATCH] D137824: [WebAssembly] multivalue stackify fix
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D137516: [TargetSupport] Move TargetParser API in a separate LLVM component.
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137516: [TargetSupport] Move TargetParser API in a separate LLVM component.
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137431: [AArch64] RME MEC instructions and system registers
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137431: [AArch64] RME MEC instructions and system registers
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137431: [AArch64] RME MEC instructions and system registers
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137431: [AArch64] RME MEC instructions and system registers
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137834: [Support] Reduce Dependence on Host.h
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137835: [ARM] Move ARM::parseBranchProtection into ARMTargetParser
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137836: [Support] Move getHostNumPhysicalCores to Threading.h
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137837: [Support] Move Target/CPU Printing out of CommandLine
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137838: [RFC][Support] Move TargetParsers to new component
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137838: [RFC][Support] Move TargetParsers to new component
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137837: [Support] Move Target/CPU Printing out of CommandLine
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137516: [TargetSupport] Move TargetParser API in a separate LLVM component.
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137834: [Support] Reduce Dependence on Host.h
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137838: [RFC][Support] Move TargetParsers to new component
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137837: [Support] Move Target/CPU Printing out of CommandLine
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137834: [Support] Reduce Dependence on Host.h
Sam Elliott via Phabricator via llvm-commits
- [compiler-rt] 32a2af4 - [CMake] Fix -Wstrict-prototypes
Sam James via llvm-commits
- [polly] 32a2af4 - [CMake] Fix -Wstrict-prototypes
Sam James via llvm-commits
- [llvm] 32a2af4 - [CMake] Fix -Wstrict-prototypes
Sam James via llvm-commits
- [PATCH] D137503: [CMake] Fix -Wstrict-prototypes
Sam James via Phabricator via llvm-commits
- [PATCH] D137503: [CMake] Fix -Wstrict-prototypes
Sam James via Phabricator via llvm-commits
- [PATCH] D137758: [HardwareLoops] remove loops which has undef count
Sam Parker via Phabricator via llvm-commits
- [PATCH] D137758: [HardwareLoops] remove loops which has undef count
Sam Parker via Phabricator via llvm-commits
- [PATCH] D137824: [WebAssembly] multivalue stackify fix
Sam Parker via Phabricator via llvm-commits
- [PATCH] D137824: [WebAssembly] multivalue stackify fix
Sam Parker via Phabricator via llvm-commits
- [PATCH] D137824: [WebAssembly] multivalue stackify fix
Sam Parker via Phabricator via llvm-commits
- [PATCH] D137613: [TypePromotion] Replace Zext to Truncate for the case src bitwidth is larger
Sam Tebbs via Phabricator via llvm-commits
- [PATCH] D137613: [TypePromotion] Replace Zext to Truncate for the case src bitwidth is larger
Sam Tebbs via Phabricator via llvm-commits
- [PATCH] D137613: [TypePromotion] Replace Zext to Truncate for the case src bitwidth is larger
Sam Tebbs via Phabricator via llvm-commits
- [PATCH] D137726: [AArch64] Allow sinking both extract and splat to smull
Sam Tebbs via Phabricator via llvm-commits
- [llvm] a7a0b82 - [AArch64] NFC: Remove unused parameter from allocateLazySaveBuffer
Sander de Smalen via llvm-commits
- [llvm] e1e260c - [AArch64][SME] Disable GlobalISel/FastISel for SME functions.
Sander de Smalen via llvm-commits
- [llvm] 8bcf5df - Revert "[AArch64][SME] Disable GlobalISel/FastISel for SME functions."
Sander de Smalen via llvm-commits
- [llvm] c85bd25 - Reland "[AArch64][SME] Disable GlobalISel/FastISel for SME functions."
Sander de Smalen via llvm-commits
- [PATCH] D137556: [POC] Clang implementation for AArch64 SME and some SME2 builtins
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D136858: [AArch64-SVE]: Force generating code compatible to streaming mode for sve-fixed-length tests.
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D136361: [AArch64][SME] Disable GlobalISel/FastISel for SME functions.
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D136361: [AArch64][SME] Disable GlobalISel/FastISel for SME functions.
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D136361: [AArch64][SME] Disable GlobalISel/FastISel for SME functions.
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D137734: [SME] Store buffer to the correct pointer when setting up lazy-save.
Sander de Smalen via Phabricator via llvm-commits
- [llvm] b62c81b - [VectorCombine] add test with non-canonical shuffle mask; NFC
Sanjay Patel via llvm-commits
- [llvm] de36d39 - [InstCombine] Avoid passing pow attributes to sqrt
Sanjay Patel via llvm-commits
- [llvm] 6703d2e - [VectorCombine] add test with addrspacecast; NFC
Sanjay Patel via llvm-commits
- [llvm] 244ac4f - [SystemZ] add test for mergeTruncStores miscompile; NFC
Sanjay Patel via llvm-commits
- [llvm] b57819e - [VectorCombine] widen a load with subvector insert
Sanjay Patel via llvm-commits
- [llvm] 58167f6 - [InstSimplify] add tests for fadd/fsub with inf constant operand; NFC
Sanjay Patel via llvm-commits
- [llvm] fbc2c8f - [InstSimplify] fold X +nnan Inf
Sanjay Patel via llvm-commits
- [llvm] 21f1b2d - [InstSimplify] fold fsub nnan with Inf operand
Sanjay Patel via llvm-commits
- [llvm] c2c48f0 - [InstSimplify] add test for fsub with inf operand; NFC
Sanjay Patel via llvm-commits
- [llvm] 095f7bd - [InstCombine] add tests for binop with select operand; NFC
Sanjay Patel via llvm-commits
- [llvm] 681a6a3 - [InstCombine] allow more folds more multi-use selects
Sanjay Patel via llvm-commits
- [llvm] 6eae6b3 - [InstCombine] allow more folds for multi-use selects (2nd try)
Sanjay Patel via llvm-commits
- [llvm] 362c235 - Revert "[InstCombine] allow more folds for multi-use selects (2nd try)"
Sanjay Patel via llvm-commits
- [PATCH] D137454: [InstCombine] Avoid passing pow attributes to sqrt
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137444: InstCombine: Fold compare with smallest normal if input denormals are flushed
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D135876: [InstCombine] Remove redundant splats in InstCombineVectorOps
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137341: [VectorCombine] widen a load with subvector insert
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137454: [InstCombine] Avoid passing pow attributes to sqrt
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137341: [VectorCombine] widen a load with subvector insert
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137341: [VectorCombine] widen a load with subvector insert
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137341: [VectorCombine] widen a load with subvector insert
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137341: [VectorCombine] widen a load with subvector insert
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D136098: InstCombine: Fold fdiv nnan x, 0 -> copysign(inf, x)
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D136912: [AArch64] precommit tests for D136623, NFC
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137610: [CodeGen] Refactor ExpandBVWithShuffles. NFC.
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137212: [InstCombine] Simplify chain of GEP with constant indices
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137635: [CodeGen] Add sources to isVectorClearMaskLegal. NFC.
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137433: [DAG] Add canonicalization to avoid redundant nots in concat vectors
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137791: [SDAG] bail out of mergeTruncStores() if there's an unknown store in the chain
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137341: [VectorCombine] widen a load with subvector insert
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137664: [InstCombine][NFC] Baseline tests for D137212 Simplify chain of GEP with constant indices
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137664: [InstCombine][NFC] Baseline tests for D137212 Simplify chain of GEP with constant indices
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137791: [SDAG] bail out of mergeTruncStores() if there's an unknown store in the chain
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D137866: [Coroutines] Do not add allocas for retcon coroutines
Sebastian Neubauer via Phabricator via llvm-commits
- [PATCH] D136354: [Driver] Enable nested configuration files
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D137811: InstCombine: Port amdgcn.class intrinsic combines to is.fpclass
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D137811: InstCombine: Port amdgcn.class intrinsic combines to is.fpclass
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D137811: InstCombine: Port amdgcn.class intrinsic combines to is.fpclass
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D136264: [libunwind][RISCV] Support reading of VLENB CSR register
Sergei Kachkov via Phabricator via llvm-commits
- [llvm] d5fb596 - [flang][OpenMP] Add parser support for Requires directive
Sergio Afonso via llvm-commits
- [PATCH] D136867: [flang][OpenMP] Add parser support for Requires directive
Sergio Afonso via Phabricator via llvm-commits
- [PATCH] D136867: [flang][OpenMP] Add parser support for Requires directive
Sergio Afonso via Phabricator via llvm-commits
- [llvm] c40ef64 - [Greedy RegAlloc] Add a test for single block split with statepoint uses.
Serguei Katkov via llvm-commits
- [PATCH] D137813: [RegAlloc Greedy]Account statepoints while splitting single basic block
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D137813: [RegAlloc Greedy]Account statepoints while splitting single basic block
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D137813: [RegAlloc Greedy]Account statepoints while splitting single basic block
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D137813: [RegAlloc Greedy]Account statepoints while splitting single basic block
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D137813: [RegAlloc Greedy]Account statepoints while splitting single basic block
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D137813: [RegAlloc Greedy]Account statepoints while splitting single basic block
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D137720: Migrate getOrCreateInternalVariable from Clang to OMPIRBuilder.
Shafik Yaghmour via Phabricator via llvm-commits
- [PATCH] D137425: [M68k] Add predicates `AtLeastM680x0`
Sheng via Phabricator via llvm-commits
- [PATCH] D136525: [M68k] Add codegen pattern for atomic load / store
Sheng via Phabricator via llvm-commits
- [PATCH] D137425: [M68k] Add predicates `AtLeastM680x0`
Sheng via Phabricator via llvm-commits
- [PATCH] D136525: [M68k] Add codegen pattern for atomic load / store
Sheng via Phabricator via llvm-commits
- [PATCH] D137425: [M68k] Add predicates `AtLeastM680x0`
Sheng via Phabricator via llvm-commits
- [PATCH] D136525: [M68k] Add codegen pattern for atomic load / store
Sheng via Phabricator via llvm-commits
- [llvm] d29d5ff - Revert "[Assignment Tracking][5.1/*] Add deleteAssignmentMarkers function"
Shubham Sandeep Rastogi via llvm-commits
- [llvm] 4c37a41 - Revert "Fix warning: comparison of integers of different signs"
Shubham Sandeep Rastogi via llvm-commits
- [llvm] 41f5a00 - Revert "[Assignment Tracking][5/*] Add core infrastructure for instruction reference"
Shubham Sandeep Rastogi via llvm-commits
- [llvm] b22d80d - Revert "[NFC] Move getDebugValueLoc from static in Local.cpp to DebugInfo.h"
Shubham Sandeep Rastogi via llvm-commits
- [PATCH] D132224: [Assignment Tracking][5/*] Add core infrastructure for instruction reference
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D132224: [Assignment Tracking][5/*] Add core infrastructure for instruction reference
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D133576: [Assignment Tracking][5.1/*] Add deleteAssignmentMarkers function
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D132357: [NFC] Move getDebugValueLoc from static in Local.cpp to DebugInfo.h
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [llvm] 4aabbc0 - [X86] Flatten WriteShift/Rotate SchedRW defs
Simon Pilgrim via llvm-commits
- [llvm] 5c0cb75 - [X86] Folded MOVDDUPrm has the same sched behaviour as MOVSHDUPrm/MOVSLDUPrm on Haswell/IceLake
Simon Pilgrim via llvm-commits
- [llvm] 471f2cf - [X86] CVTTSS2SI64rm has the same scheduler def as (V)CVTSS2SI64rm
Simon Pilgrim via llvm-commits
- [llvm] 1dd0613 - [X86] SkylakeClientModel - fix instregex typo. NFCI.
Simon Pilgrim via llvm-commits
- [llvm] 2e30d32 - [Visualizers] Add natvis visualizers for various internal llvm classes
Simon Pilgrim via llvm-commits
- [llvm] a209744 - [X86] Replace unnecessary CVTSD2SI/CVTSS2SI overrides with better base class defs
Simon Pilgrim via llvm-commits
- [llvm] 810b8fd - [X86] Replace unnecessary CVTPS2PI/CVTPS2DQ overrides with better base class defs
Simon Pilgrim via llvm-commits
- [llvm] 261b3f7 - [X86] Add missing Zen3 model subtypes
Simon Pilgrim via llvm-commits
- [llvm] 30498cf - [X86] SkylakeClientModel - conversion instructions don't use Port015
Simon Pilgrim via llvm-commits
- [llvm] 2116d69 - [X86] Replace unnecessary CVTPS2DQ folded overrides with better base class defs
Simon Pilgrim via llvm-commits
- [llvm] 192b715 - [X86] Split int2double and float2double scheduler classes on Haswell/Broadwell to remove overrides
Simon Pilgrim via llvm-commits
- [llvm] da2366d - [X86] Replace unnecessary SKL conversion overrides with better base class defs
Simon Pilgrim via llvm-commits
- [llvm] 3182ea4 - [X86] Tweak Alderlake instregex to match CodeGen-only and public scalar instruction ops
Simon Pilgrim via llvm-commits
- [llvm] b31a5d7 - [X86] Replace unnecessary SKL CVTPD2DQ overrides with better base class defs
Simon Pilgrim via llvm-commits
- [llvm] 07c8f3d - [X86] SkylakeServerModel - conversion instructions don't use Port015
Simon Pilgrim via llvm-commits
- [llvm] 2be46b3 - [MCA][X86][AVX512] Add test coverage for unsigned<->fp conversion instructions
Simon Pilgrim via llvm-commits
- [llvm] fca6364 - [X86] Replace unnecessary SKL CVTSI2SS/CVTSI2SD overrides with better base class defs
Simon Pilgrim via llvm-commits
- [llvm] cbe5b2d - [MCA][X86] Add test coverage for GFNI instructions
Simon Pilgrim via llvm-commits
- [llvm] 9ec1c83 - [X86] Always classify gf2p8affineqb/gf2p8affineinvqb instructions with SchedWriteVecIMul
Simon Pilgrim via llvm-commits
- [llvm] 0c64d46 - [MCA][X86] Add missing AVX-GFNI YMM test coverage
Simon Pilgrim via llvm-commits
- [llvm] cd3cced - [MCA][X86] Add test coverage for VNNI instructions
Simon Pilgrim via llvm-commits
- [llvm] 4a28b7b - [X86] IceLakeModel - conversion instructions don't use Port015
Simon Pilgrim via llvm-commits
- [llvm] 4e0d2f8 - [X86] Fix sched class typo - the CVTPD2DQrr instructions were mapping to ZnWriteCVTDQ2PDr instead of ZnWriteCVTPD2DQr
Simon Pilgrim via llvm-commits
- [llvm] e19cb9c - [X86] Cleanup CVTPD2PS schedule values
Simon Pilgrim via llvm-commits
- [llvm] 313a4ae - [X86] Fix scheduler tag for GFNI YMM instructions
Simon Pilgrim via llvm-commits
- [llvm] 6a99f23 - [MCA][X86] Add test coverage for VDBPSADBW instructions
Simon Pilgrim via llvm-commits
- [llvm] 05df547 - [X86] Remove unnecessary VPSADBW/VDBPSADBW zmm overrides
Simon Pilgrim via llvm-commits
- [llvm] e5120a4 - [X86] Update WriteMPSAD class and remove VMPSADBWrri override
Simon Pilgrim via llvm-commits
- [llvm] d9bff27 - [X86] Regenerate combine-movmsk.ll
Simon Pilgrim via llvm-commits
- [PATCH] D135685: [Visualizers] Add natvis visualizers for various internal llvm classes
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D136771: [AArch64] Canonicalize SIGN_EXTEND to VSELECT
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D135876: [InstCombine] Remove redundant splats in InstCombineVectorOps
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D135685: [Visualizers] Add natvis visualizers for various internal llvm classes
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D135685: [Visualizers] Add natvis visualizers for various internal llvm classes
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D136047: [DAGCombiner] Option --combiner-select-seq
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137635: [CodeGen] Add sources to isVectorClearMaskLegal. NFC.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137388: [X86] Add necessary check isReg() when updating LiveVariables in convertToThreeAddress
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137635: [CodeGen] Add sources to isVectorClearMaskLegal. NFC.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137639: [SLP]Fix PR58863: Mask index beyond mask size for non-power-2 insertelement analysis.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137639: [SLP]Fix PR58863: Mask index beyond mask size for non-power-2 insertelement analysis.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137635: [CodeGen] Add sources to isVectorClearMaskLegal. NFC.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D136753: [DemandedBits] Add Div instruction to DetermineLiveOperandBits
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D135685: [Visualizers] Add natvis visualizers for various internal llvm classes
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137695: [X86] Add missing Zen3+ model subtypes
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137695: [X86] Add missing Zen3+ model subtypes
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137695: [X86] Add missing Zen3+ model subtypes
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137433: [DAG] Add canonicalization to avoid redundant nots in concat vectors
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137341: [VectorCombine] widen a load with subvector insert
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137711: [X86] Use lock add/sub for cases that we only care about the EFLAGS
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137695: [X86] Add missing Zen3 model subtypes
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137388: [X86] Add necessary check isReg() when updating LiveVariables in convertToThreeAddress
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137695: [X86] Add missing Zen3 model subtypes
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137388: [X86] Add necessary check isReg() when updating LiveVariables in convertToThreeAddress
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137433: [DAG] Add canonicalization to avoid redundant nots in concat vectors
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137841: [X86] Reduce unnecessary instregex for AlderlakeP schedule model
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137841: [X86] Reduce unnecessary instregex for AlderlakeP schedule model
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137841: [X86] Reduce unnecessary instregex for AlderlakeP schedule model
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137026: [X86] Use GFNI for vXi8 shifts/rotates
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D47637: Check Sched Class tables at generation time
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137913: [X86] Rewrite `getScalarizationOverhead()`
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D137535: [CodeGen][BasicBlockSections] Fix wrong alignment directive placement in basic block section cases
Sinan Lin via Phabricator via llvm-commits
- [PATCH] D136237: [BasicBlockSections] avoid insertting redundant branch to fall through blocks
Sinan Lin via Phabricator via llvm-commits
- [PATCH] D136237: [BasicBlockSections] avoid insertting redundant branch to fall through blocks
Sinan Lin via Phabricator via llvm-commits
- [PATCH] D137535: [CodeGen][BasicBlockSections] Fix wrong alignment directive placement in basic block section cases
Sinan Lin via Phabricator via llvm-commits
- [PATCH] D136237: [BasicBlockSections] avoid insertting redundant branch to fall through blocks
Sinan Lin via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Siva Chandra via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget SCEV value for removed incomming values of phi
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget all block and loop dispositions after flatten
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D137138: AMDGPU: Fix DivergenceAnalysis for llvm.read_register
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D137222: [MachineCSE] Allow CSE for instructions with ignorable operands
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [llvm] 1ef2a92 - [PowerPC] Add the SUBFUS instruction to Future CPU.
Stefan Pintilie via llvm-commits
- [PATCH] D137643: [PowerPC] Add the SUBFUS instruction to Future CPU.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D133700: [PowerPC] Exploit xxperm, check for dead vectors and substitute vperm with xxperm
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D133700: [PowerPC] Exploit xxperm, check for dead vectors and substitute vperm with xxperm
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D137643: [PowerPC] Add the SUBFUS instruction to Future CPU.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D137624: [AMDGPU] Declutter applyPreexistingWaitcnt()
Stephen Thomas via Phabricator via llvm-commits
- [PATCH] D137624: [AMDGPU] Declutter applyPreexistingWaitcnt()
Stephen Thomas via Phabricator via llvm-commits
- [PATCH] D137624: [AMDGPU] Declutter applyPreexistingWaitcnt()
Stephen Thomas via Phabricator via llvm-commits
- [PATCH] D136173: [DebugInfo] Add function to test debug values for equivalence
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D136173: [DebugInfo] Add function to test debug values for equivalence
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D133926: [DebugInfo] Allow non-stack_value variadic expressions and use in DBG_INSTR_REF
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D133926: [DebugInfo] Allow non-stack_value variadic expressions and use in DBG_INSTR_REF
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D136173: [DebugInfo] Add function to test debug values for equivalence
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D131830: [OpenMP] Clang Support for taskwait nowait clause
Sunil K via Phabricator via llvm-commits
- [PATCH] D137642: [X86][CodeGen] Fix crash in hotpatch
Sylvain Audi via Phabricator via llvm-commits
- [PATCH] D137642: [X86][CodeGen] Fix crash in hotpatch
Sylvain Audi via Phabricator via llvm-commits
- [PATCH] D137723: [PDB] Don't include input files in the 'cmd' entry of S_ENVBLOCK
Sylvain Audi via Phabricator via llvm-commits
- [PATCH] D137723: [PDB] Don't include input files in the 'cmd' entry of S_ENVBLOCK
Sylvain Audi via Phabricator via llvm-commits
- [PATCH] D137723: [PDB] Don't include input files in the 'cmd' entry of S_ENVBLOCK
Sylvain Audi via Phabricator via llvm-commits
- [PATCH] D137101: [CodeView] Replace GHASH hasher by BLAKE3
Sylvain Audi via Phabricator via llvm-commits
- [PATCH] D137642: [X86][CodeGen] Fix crash in hotpatch
Sylvain Audi via Phabricator via llvm-commits
- [PATCH] D137723: [PDB] Don't include input files in the 'cmd' entry of S_ENVBLOCK
Sylvain Audi via Phabricator via llvm-commits
- [PATCH] D137723: [PDB] Don't include input files in the 'cmd' entry of S_ENVBLOCK
Sylvain Audi via Phabricator via llvm-commits
- [PATCH] D137880: [Docs] Minor Fixups in Advanced Builds Documentation
Sylvestre Ledru via Phabricator via llvm-commits
- [PATCH] D137898: [Docs] Add Documentation on (Thin)LTO + PGO Build Configs
Sylvestre Ledru via Phabricator via llvm-commits
- [PATCH] D137899: [Docs] Add Documentation on BOLT Build Configs
Sylvestre Ledru via Phabricator via llvm-commits
- [PATCH] D137898: [Docs] Add Documentation on (Thin)LTO + PGO Build Configs
Sylvestre Ledru via Phabricator via llvm-commits
- [PATCH] D102817: [Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2
Ten Tzen via Phabricator via llvm-commits
- [PATCH] D102817: [Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2
Ten Tzen via Phabricator via llvm-commits
- [PATCH] D102817: [Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2
Ten Tzen via Phabricator via llvm-commits
- [PATCH] D102817: [Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2
Ten Tzen via Phabricator via llvm-commits
- [PATCH] D102817: [Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2
Ten Tzen via Phabricator via llvm-commits
- [PATCH] D135590: [ThinLTO][ELF] Add a ThinLTO warning if cache_size_bytes or cache_size_files is too small for the current link job.
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D137768: [opt] Enable using -module-summary with -S
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D137768: [opt][clang] Enable using -module-summary with -S / -emit-llvm
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D137815: [DirectX backend] Fix build and test error caused by out of sync with upstream change.
Tex Riddell via Phabricator via llvm-commits
- [PATCH] D137815: [DirectX backend] Fix build and test error caused by out of sync with upstream change.
Tex Riddell via Phabricator via llvm-commits
- [PATCH] D137551: [WebAssembly] Use default attributes for intrinsics
Thomas Lively via Phabricator via llvm-commits
- [PATCH] D137824: [WebAssembly] multivalue stackify fix
Thomas Lively via Phabricator via llvm-commits
- [PATCH] D137824: [WebAssembly] multivalue stackify fix
Thomas Lively via Phabricator via llvm-commits
- [llvm] c8be352 - [SWP] Recognize mem carried dep with different base
Thomas Preud'homme via llvm-commits
- [PATCH] D136463: [SWP] Recognize mem carried dep with different base
Thomas Preud'homme via Phabricator via llvm-commits
- [llvm] d0133bf - [NFC][AMDGPU] Pre-commit tests for D136432.
Thomas Symalla via llvm-commits
- [PATCH] D136432: [AMDGPU] Combine BFI instructions.
Thomas Symalla via Phabricator via llvm-commits
- [PATCH] D136432: [AMDGPU] Combine BFI instructions.
Thomas Symalla via Phabricator via llvm-commits
- [PATCH] D136589: [AArch64] Add support for the Cortex-X3 CPU
Thorsten via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Thorsten via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
Thorsten via Phabricator via llvm-commits
- [PATCH] D137666: [msan] Increase size of app/shadow/origin mappings on aarch64
Thurston Dang via Phabricator via llvm-commits
- [PATCH] D137666: [msan] Increase size of app/shadow/origin mappings on aarch64
Thurston Dang via Phabricator via llvm-commits
- [PATCH] D137666: [msan] Increase size of app/shadow/origin mappings on aarch64
Thurston Dang via Phabricator via llvm-commits
- [PATCH] D137666: [msan] Increase size of app/shadow/origin mappings on aarch64
Thurston Dang via Phabricator via llvm-commits
- [PATCH] D137666: [msan] Increase size of app/shadow/origin mappings on aarch64
Thurston Dang via Phabricator via llvm-commits
- [PATCH] D137666: [msan] Increase size of app/shadow/origin mappings on aarch64
Thurston Dang via Phabricator via llvm-commits
- [PATCH] D133036: [InstCombine] Treat passing undef to noundef params as UB
Tim Neumann via Phabricator via llvm-commits
- [PATCH] D133036: [InstCombine] Treat passing undef to noundef params as UB
Tim Neumann via Phabricator via llvm-commits
- [PATCH] D133036: [InstCombine] Treat passing undef to noundef params as UB
Tim Neumann via Phabricator via llvm-commits
- [PATCH] D133036: [InstCombine] Treat passing undef to noundef params as UB
Tim Neumann via Phabricator via llvm-commits
- [llvm] 2bcf51c - X86: call fp16-conversion functions soft-float on Darwin.
Tim Northover via llvm-commits
- [PATCH] D136443: X86: use soft-float ABI for fp16 libcalls on Darwin
Tim Northover via Phabricator via llvm-commits
- [PATCH] D137631: AArch64: implement canonical `!isnan(...)` with single compare.
Tim Northover via Phabricator via llvm-commits
- [PATCH] D136753: [DemandedBits] Add Div instruction to DetermineLiveOperandBits
Tim Northover via Phabricator via llvm-commits
- [PATCH] D136443: X86: use soft-float ABI for fp16 libcalls on Darwin
Tim Northover via Phabricator via llvm-commits
- [polly] e1b88c8 - [clang] Only use major version in resource dir
Timm Bäder via llvm-commits
- [PATCH] D125860: [clang] Only use major version in resource dir
Timm Bäder via Phabricator via llvm-commits
- [PATCH] D125860: [clang] Only use major version in resource dir
Timm Bäder via Phabricator via llvm-commits
- [PATCH] D125860: [clang] Only use major version in resource dir
Timm Bäder via Phabricator via llvm-commits
- [llvm] aa99b60 - [clang][pdb] Don't include -fmessage-length in PDB buildinfo
Tobias Hieta via llvm-commits
- [PATCH] D137322: [clang][pdb] Don't include -fmessage-length in PDB buildinfo
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D137322: [clang][pdb] Don't include -fmessage-length in PDB buildinfo
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D137322: [clang][pdb] Don't include -fmessage-length in PDB buildinfo
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D137322: [clang][pdb] Don't include -fmessage-length in PDB buildinfo
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D137724: [CMake] Warn when the version is older than 3.20.0.
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D137101: [CodeView] Replace GHASH hasher by BLAKE3
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D137723: [PDB] Don't include input files in the 'cmd' entry of S_ENVBLOCK
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D137555: [cmake] Add missing CMakePushCheckState include to FindLibEdit.cmake
Tobias Ribizel via Phabricator via llvm-commits
- [PATCH] D137909: [Support] Allow complex names for annotation points and ranges via $()
Tom Praschan via Phabricator via llvm-commits
- [polly] 5905246 - Move googletest to the third-party directory
Tom Stellard via llvm-commits
- [lld] 5905246 - Move googletest to the third-party directory
Tom Stellard via llvm-commits
- [llvm] 8a084f6 - Revert "Move googletest to the third-party directory"
Tom Stellard via llvm-commits
- [polly] a11cd0d - Move googletest to the third-party directory
Tom Stellard via llvm-commits
- [compiler-rt] 2f2b465 - cmake: Fix build with -DLLVM_BUILD_EXTERNAL_COMPILER_RT=ON
Tom Stellard via llvm-commits
- [llvm] 1cb97a1 - docs: Add instructions for stand-alone builds of clang
Tom Stellard via llvm-commits
- [llvm] a7ba84a - cmake: Inline the add_llvm_symbol_exports.py script
Tom Stellard via llvm-commits
- [llvm] b473734 - docs: add instructions for stand-alone builds of lld
Tom Stellard via llvm-commits
- [PATCH] D137611: cmake: Inline the add_llvm_symbol_exports.py script
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D125860: [clang] Only use major version in resource dir
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D137669: clang/cmake: Require pre-built test dependencies for stand-alone builds
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D137669: clang/cmake: Require pre-built test dependencies for stand-alone builds
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D131919: Move googletest to the third-party directory
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D123968: docs: Add instructions for stand-alone builds of clang
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D123968: docs: Add instructions for stand-alone builds of clang
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D137611: cmake: Inline the add_llvm_symbol_exports.py script
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D137669: clang/cmake: Require pre-built test dependencies for stand-alone builds
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D137854: libclc: Use cmake files instead of llvm-config
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D124405: docs: add instructions for stand-alone builds of lld
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D137890: Add install targets for gtest
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D137338: Fix dupe word typos
Tom leet via Phabricator via llvm-commits
- [llvm] 103bbdd - [ARM] Move Triple::getARMCPUForArch into ARMTargetParser
Tomas Matheson via llvm-commits
- [PATCH] D137517: [TargetSupport] Generate the defs for RISCV CPUs using llvm-tblgen.
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D137564: [ARM] Move Triple::getARMCPUForArch into ARMTargetParser
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D137564: [ARM] Move Triple::getARMCPUForArch into ARMTargetParser
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D137835: [ARM] Move ARM::parseBranchProtection into ARMTargetParser
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D137836: [Support] Move getHostNumPhysicalCores to Threading.h
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D137924: [TargetParser] Split AArch64TargetParser from ARMTargetParser
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D135685: [Visualizers] Add natvis visualizers for various internal llvm classes
Trass3r via Phabricator via llvm-commits
- [PATCH] D135685: [Visualizers] Add natvis visualizers for various internal llvm classes
Trass3r via Phabricator via llvm-commits
- [PATCH] D135685: [Visualizers] Add natvis visualizers for various internal llvm classes
Trass3r via Phabricator via llvm-commits
- [PATCH] D135685: [Visualizers] Add natvis visualizers for various internal llvm classes
Trass3r via Phabricator via llvm-commits
- [PATCH] D135685: [Visualizers] Add natvis visualizers for various internal llvm classes
Trass3r via Phabricator via llvm-commits
- [PATCH] D135685: [Visualizers] Add natvis visualizers for various internal llvm classes
Trass3r via Phabricator via llvm-commits
- [PATCH] D137914: [cmake] Simplify llvm_update_compile_flags
Trass3r via Phabricator via llvm-commits
- [PATCH] D137916: [cmake] Disable RTTI for tests
Trass3r via Phabricator via llvm-commits
- [PATCH] D137916: [cmake] Disable RTTI for tests
Trass3r via Phabricator via llvm-commits
- [PATCH] D137917: [cmake] Fix _GNU_SOURCE being added unconditionally
Trass3r via Phabricator via llvm-commits
- [PATCH] D137918: move expensive parts of Hashing.h into cpp file
Trass3r via Phabricator via llvm-commits
- [PATCH] D137918: move expensive parts of Hashing.h into cpp file
Trass3r via Phabricator via llvm-commits
- [PATCH] D137920: [nfc] Mark classes final as reported by -Wsuggest-final-types
Trass3r via Phabricator via llvm-commits
- [PATCH] D137920: [nfc] Mark classes final as reported by -Wsuggest-final-types
Trass3r via Phabricator via llvm-commits
- [PATCH] D137044: [ClangFE] Add support for option -mno-pic-data-is-text-relative
Ulrich Weigand via Phabricator via llvm-commits
- [PATCH] D137292: [lsan] Fix stack buffer overwrite in SuspendedThreadsListMac::GetRegistersAndSP
Usama Hameed via Phabricator via llvm-commits
- [PATCH] D137292: [lsan] Fix stack buffer overwrite in SuspendedThreadsListMac::GetRegistersAndSP
Usama Hameed via Phabricator via llvm-commits
- [PATCH] D137292: [lsan] Fix stack buffer overwrite in SuspendedThreadsListMac::GetRegistersAndSP
Usama Hameed via Phabricator via llvm-commits
- [PATCH] D136069: [AMDGPU] Scheduler: Don't revert the schedule if the register pressure isn't changed for a region
Valery Pykhtin via Phabricator via llvm-commits
- [llvm] 9d1ff78 - [AArch64] Add support for the Cortex-X3 CPU
Victor Campos via llvm-commits
- [PATCH] D136589: [AArch64] Add support for the Cortex-X3 CPU
Victor Campos via Phabricator via llvm-commits
- [PATCH] D136589: [AArch64] Add support for the Cortex-X3 CPU
Victor Campos via Phabricator via llvm-commits
- [PATCH] D136589: [AArch64] Add support for the Cortex-X3 CPU
Victor Campos via Phabricator via llvm-commits
- [compiler-rt] def0823 - [compiler-rt] Set CMP0114 policy for standalone build
Vitaly Buka via llvm-commits
- [PATCH] D130718: [compiler-rt] [builtins] Detect _Float16 support at compile time
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D130718: [compiler-rt] [builtins] Detect _Float16 support at compile time
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D137666: [msan] Increase size of app/shadow/origin mappings on aarch64
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Vladislav Khmelevsky via Phabricator via llvm-commits
- [llvm] 791bdba - [Support] Format provider improvements
Vladislav Vinogradov via llvm-commits
- [llvm] 5ea8de2 - Revert "[Support] Format provider improvements"
Vladislav Vinogradov via llvm-commits
- [llvm] 3dbda5f - [Support] Format provider improvements
Vladislav Vinogradov via llvm-commits
- [PATCH] D94769: [Support] Format provider improvements
Vladislav Vinogradov via Phabricator via llvm-commits
- [PATCH] D136374: [lld-macho] Don't put entries with less than 2 usages into the common table.
Vy Nguyen via Phabricator via llvm-commits
- [PATCH] D137530: [RISCV] Splat scalar to be of length VL instead of 1 for reductions
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D137530: [RISCV] Splat scalar to be of length VL instead of 1 for reductions
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D137517: [TargetSupport] Generate the defs for RISCV CPUs using llvm-tblgen.
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D137699: [RISCV] Don't use zero-stride vector load if there's no optimized u-arch
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D137699: [RISCV] Don't use zero-stride vector load if there's no optimized u-arch
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D137699: [RISCV] Don't use zero-stride vector load if there's no optimized u-arch
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D137699: [RISCV] Don't use zero-stride vector load if there's no optimized u-arch
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D137530: [RISCV] Splat scalar to be of length VL instead of 1 for reductions
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D137530: [RISCV] Splat scalar to be of length VL instead of 1 for reductions
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D137530: [RISCV] Splat scalar to be of length VL instead of 1 for reductions
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D137699: [RISCV] Don't use zero-stride vector load if there's no optimized u-arch
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D137699: [RISCV] Don't use zero-stride vector load if there's no optimized u-arch
Wang Pengcheng via Phabricator via llvm-commits
- [compiler-rt] eae8d93 - [sanitizer] Add GetMaxVirtualAddress() support for LoongArch
Weining Lu via llvm-commits
- [compiler-rt] 14cd113 - [sanitizer] Add the settings of Read and Write flags in SignalContext for LoongArch
Weining Lu via llvm-commits
- [compiler-rt] 91bc4ab - [sanitizer][test] Fix FastUnwindTest on LoongArch
Weining Lu via llvm-commits
- [compiler-rt] 8993f3e - [sanitizer] Add symbolizer support for loongarch64
Weining Lu via llvm-commits
- [compiler-rt] 3ba498d - [fuzzer][test] Add #include <cstdint> for gcc-13
Weining Lu via llvm-commits
- [llvm] d480271 - [ADT][Triple] Add environment kinds for LoongArch GNU multiarch tuples
Weining Lu via llvm-commits
- [llvm] 6890b9b - Add missing changes for "[Clang][LoongArch] Handle -march/-m{single,double,soft}-float/-mfpu options"
Weining Lu via llvm-commits
- [compiler-rt] 1e2c20f - [compiler-rt] Mark $t* as clobbered for Linux/LoongArch syscalls
Weining Lu via llvm-commits
- [llvm] bd2b5ec - [InstCombine] PR58901 - fix bug with swapping GEP of different types
William Huang via llvm-commits
- [PATCH] D137664: [InstCombine][NFC] Baseline tests for D137212 Simplify chain of GEP with constant indices
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D137212: [InstCombine] Simplify chain of GEP with constant indices
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D137212: [InstCombine] Simplify chain of GEP with constant indices
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D137752: [InstCombine] PR58901 - fix bug with swapping GEP of different types
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D137752: [InstCombine] PR58901 - fix bug with swapping GEP of different types
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D137664: [InstCombine][NFC] Baseline tests for D137212 Simplify chain of GEP with constant indices
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D115218: [CodeExtractor] Refactor extractCodeRegion, fix parameter index confusion.
William Moses via Phabricator via llvm-commits
- [PATCH] D137532: [LoongArch] Implement the TargetLowering::getRegisterByName hook
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D137815: [DirectX backend] Fix build and test error caused by out of sync with upstream change.
Xiang Li via Phabricator via llvm-commits
- [PATCH] D137815: [DirectX backend] Fix build and test error caused by out of sync with upstream change.
Xiang Li via Phabricator via llvm-commits
- [PATCH] D137815: [DirectX backend] Fix build and test error caused by out of sync with upstream change.
Xiang Li via Phabricator via llvm-commits
- [PATCH] D137815: [DirectX backend] Fix build and test error caused by out of sync with upstream change.
Xiang Li via Phabricator via llvm-commits
- [PATCH] D137815: [DirectX backend] Fix build and test error caused by out of sync with upstream change.
Xiang Li via Phabricator via llvm-commits
- [PATCH] D137815: [DirectX backend] Fix build and test error caused by out of sync with upstream change.
Xiang Li via Phabricator via llvm-commits
- [llvm] 57ad3f1 - [LoongArch] Add support for the BranchRelaxation pass
Xiaodong Liu via llvm-commits
- [llvm] 070ab2b - [LangRef][LoongArch] Update inline asm constraint code and operand modifier
Xiaodong Liu via llvm-commits
- [PATCH] D137528: [doc][LoongArch] Update inline asm constraint code and operand modifier
Xiaodong Liu via Phabricator via llvm-commits
- [PATCH] D137233: [LoongArch] Add support for the BranchRelaxation pass
Xiaodong Liu via Phabricator via llvm-commits
- [PATCH] D137528: [LangRef][LoongArch] Update inline asm constraint code and operand modifier
Xiaodong Liu via Phabricator via llvm-commits
- [PATCH] D137528: [LangRef][LoongArch] Update inline asm constraint code and operand modifier
Xiaodong Liu via Phabricator via llvm-commits
- [PATCH] D137821: Handle register spill in BranchRelaxation pass
Xiaodong Liu via Phabricator via llvm-commits
- [PATCH] D137821: [LoongArch] Handle register spill in BranchRelaxation pass
Xiaodong Liu via Phabricator via llvm-commits
- [PATCH] D134599: [RISCV] Add CodeGen support of RISCV zcmp Extension
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D137864: [Support] Use thread safe version of getpwuid and getpwnam.
Yabin Cui via Phabricator via llvm-commits
- [PATCH] D137407: [GlobalIsel] Handle carry output generated in narrowScalarAddSub legalize action
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D137407: [GlobalIsel] Handle carry output generated in narrowScalarAddSub legalize action
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Yashwant Singh via Phabricator via llvm-commits
- [llvm] 06a7e04 - [RISCV][NFC] Fix unused variable warning.
Yeting Kuo via llvm-commits
- [llvm] 0c0681b - [RISCV][NFC] Remove dead code.
Yeting Kuo via llvm-commits
- [PATCH] D137633: [RISCV][NFC] Fix unused variable warning.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D137685: [VP][RISCV] Add vp.nearbyint and RISC-V support.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D137685: [VP][RISCV] Add vp.nearbyint and RISC-V support.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D137766: [RISCV] Add basic cost model for vp float rounding instructions.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D137633: [RISCV][NFC] Fix unused variable warning.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D137685: [VP][RISCV] Add vp.nearbyint and RISC-V support.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D137685: [VP][RISCV] Add vp.nearbyint and RISC-V support.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D137907: [RISCV][NFC] Remove dead code.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D137907: [RISCV][NFC] Remove dead code.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D137632: [LoopPredication] Widen checks if condition operands constant ranges are known
Yevgeny Rouban via Phabricator via llvm-commits
- [PATCH] D135590: [ThinLTO][ELF] Add a ThinLTO warning if cache_size_bytes or cache_size_files is too small for the current link job.
Ying Yi via Phabricator via llvm-commits
- [PATCH] D135590: [ThinLTO][ELF] Add a ThinLTO warning if cache_size_bytes or cache_size_files is too small for the current link job.
Ying Yi via Phabricator via llvm-commits
- [PATCH] D135590: [ThinLTO][ELF] Add a ThinLTO warning if cache_size_bytes or cache_size_files is too small for the current link job.
Ying Yi via Phabricator via llvm-commits
- [PATCH] D135590: [ThinLTO][ELF] Add a ThinLTO warning if cache_size_bytes or cache_size_files is too small for the current link job.
Ying Yi via Phabricator via llvm-commits
- [PATCH] D135590: [ThinLTO][ELF] Add a ThinLTO warning if cache_size_bytes or cache_size_files is too small for the current link job.
Ying Yi via Phabricator via llvm-commits
- [PATCH] D135590: [ThinLTO][ELF] Add a ThinLTO warning if cache_size_bytes or cache_size_files is too small for the current link job.
Ying Yi via Phabricator via llvm-commits
- [PATCH] D135590: [ThinLTO][ELF] Add a ThinLTO warning if cache_size_bytes or cache_size_files is too small for the current link job.
Ying Yi via Phabricator via llvm-commits
- [PATCH] D137384: [MC][LoongArch] Fix needsRelocateWithSymbol() implementation
Youling Tang via Phabricator via llvm-commits
- [PATCH] D80392: [mips][mc][clang] Use pc-relative relocations in .eh_frame
YunQiang Su via Phabricator via llvm-commits
- [PATCH] D135991: [AArch64] Fix cost model for `udiv` instruction when one of the operands is a uniform constant
Zain Jaffal via Phabricator via llvm-commits
- [PATCH] D134711: [AArch64] Select SMULL for zero extended vectors when top bit is zero
Zain Jaffal via Phabricator via llvm-commits
- [PATCH] D134711: [AArch64] Select SMULL for zero extended vectors when top bit is zero
Zain Jaffal via Phabricator via llvm-commits
- [PATCH] D135991: [AArch64] Fix cost model for `udiv` instruction when one of the operands is a uniform constant
Zain Jaffal via Phabricator via llvm-commits
- [PATCH] D135991: [AArch64] Fix cost model for `udiv` instruction when one of the operands is a uniform constant
Zain Jaffal via Phabricator via llvm-commits
- [PATCH] D137689: [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip token-producing Instructions
Zhang via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip token-producing Instructions
Zhang via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip token-producing Instructions
Zhang via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip token-producing Instructions
Zhang via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip token-producing Instructions
Zhang via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip token-producing Instructions
Zhang via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip token-producing Instructions
Zhang via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip token-producing Instructions
Zhang via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip non-sized Instructions
Zhang via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip non-sized Instructions
Zhang via Phabricator via llvm-commits
- [PATCH] D136014: Recommit [AArch64] Improve codegen for shifted mask op
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137613: [TypePromotion] Replace Zext to Truncate for the case src bitwidth is larger
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137069: [AArch64] Support all extend op for pattern: (ExtendNode - Y) + Z --> (Z - Y) + ExtendNode
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137069: [AArch64] Support all extend op for pattern: (ExtendNode - Y) + Z --> (Z - Y) + ExtendNode
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137613: [TypePromotion] Replace Zext to Truncate for the case src bitwidth is larger
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137069: [AArch64] Support all extend/shift op for pattern: (ExtendOrShfitNode - Y) + Z --> (Z - Y) + ExtendOrShfitNode
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137613: [TypePromotion] Replace Zext to Truncate for the case src bitwidth is larger
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137613: [TypePromotion] Replace Zext to Truncate for the case src bitwidth is larger
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137069: [AArch64] Support all extend/shift op for pattern: (ExtendOrShfitNode - Y) + Z --> (Z - Y) + ExtendOrShfitNode
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137069: [AArch64] Support all extend/shift op for pattern: (ExtendOrShfitNode - Y) + Z --> (Z - Y) + ExtendOrShfitNode
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137778: [GlobalISel] Correct constant type in matchReassocConstantInnerLHS
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D128631: [AArch64] Initial sched model for Neoverse N2
dewen via Phabricator via llvm-commits
- [PATCH] D128631: [AArch64] Initial sched model for Neoverse N2
dewen via Phabricator via llvm-commits
- [PATCH] D128631: [AArch64] Initial sched model for Neoverse N2
dewen via Phabricator via llvm-commits
- [PATCH] D136858: [AArch64-SVE]: Force generating code compatible to streaming mode for sve-fixed-length tests.
hassnaaHamdi via Phabricator via llvm-commits
- [PATCH] D136858: [AArch64-SVE]: Force generating code compatible to streaming mode for sve-fixed-length tests.
hassnaaHamdi via Phabricator via llvm-commits
- [PATCH] D136858: [AArch64-SVE]: Force generating code compatible to streaming mode for sve-fixed-length tests.
hassnaaHamdi via Phabricator via llvm-commits
- [PATCH] D137537: [SLP] Extend reordering data of tree entry to support PHI nodes
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D136757: [SLP] Extend reordering data of tree entry to support PHI nodes
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy analysis to check scalar operands of buffer instructions use scalar registers.
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D137537: [SLP] Extend reordering data of tree entry to support PHI nodes
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy analysis to check scalar operands of buffer instructions use scalar registers.
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D137567: [SLP][NFC] Restructure getInsertIndex
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D137569: [SLP][NFC] Restructure areTwoInsertFromSameBuildVector
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D137537: [SLP] Extend reordering data of tree entry to support PHI nodes
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D137567: [SLP][NFC] Restructure getInsertIndex
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D137569: [SLP][NFC] Restructure areTwoInsertFromSameBuildVector
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D137537: [SLP] Extend reordering data of tree entry to support PHI nodes
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy analysis to check scalar operands of buffer instructions use scalar registers.
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D137567: [SLP][NFC] Restructure getInsertIndex
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D137537: [SLP] Extend reordering data of tree entry to support PHI nodes
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D137537: [SLP] Extend reordering data of tree entry to support PHI nodes
krishna chaitanya sankisa via Phabricator via llvm-commits
- [PATCH] D137553: [MemorySSA] Delete dead MemoryUseOrDef for CallInst when clone loop basicblock
luxufan via Phabricator via llvm-commits
- [PATCH] D137553: [MemorySSA] Delete dead MemoryUseOrDef for CallInst when clone loop basicblock
luxufan via Phabricator via llvm-commits
- [PATCH] D137553: [MemorySSA] Delete dead MemoryUseOrDef for CallInst when clone loop basicblock
luxufan via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget SCEV value for removed incomming values of phi
luxufan via Phabricator via llvm-commits
- [PATCH] D137553: [MemorySSA] Delete dead MemoryUseOrDef for CallInst when clone loop basicblock
luxufan via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget SCEV value for removed incomming values of phi
luxufan via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget SCEV block and loop dispositions for removed incomming values of phi
luxufan via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget SCEV block and loop dispositions for removed incomming values of phi
luxufan via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget all block and loop dispositions after flatten
luxufan via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget all block and loop dispositions after flatten
luxufan via Phabricator via llvm-commits
- [PATCH] D137553: [MemorySSA] Delete dead MemoryUseOrDef for CallInst when clone loop basicblock
luxufan via Phabricator via llvm-commits
- [PATCH] D137910: [SimpleLoopUnswitch] Forget loop if its one of user was replaced
luxufan via Phabricator via llvm-commits
- [PATCH] D137651: [LoopFlatten] Forget all block and loop dispositions after flatten
luxufan via Phabricator via llvm-commits
- [PATCH] D137910: [SimpleLoopUnswitch] Forget loop if its one of user was replaced
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Last message date:
Sun Nov 13 23:58:00 PST 2022
Archived on: Tue Dec 6 14:52:19 PST 2022
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