[llvm] b1e9c43 - [Test] Add test for crash in IRCE when IV is AddRec for another loop

Dmitry Makogon via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 11 01:50:10 PST 2022


Author: Dmitry Makogon
Date: 2022-11-11T16:49:55+07:00
New Revision: b1e9c4334e43767aa9d761903559d97891836116

URL: https://github.com/llvm/llvm-project/commit/b1e9c4334e43767aa9d761903559d97891836116
DIFF: https://github.com/llvm/llvm-project/commit/b1e9c4334e43767aa9d761903559d97891836116.diff

LOG: [Test] Add test for crash in IRCE when IV is AddRec for another loop

This adds a test for https://github.com/llvm/llvm-project/issues/58912.
IRCE crashes when it tries to check whether it is possible to safely
calculate the bounds of a loop with IV AddRec which is in another loop.

Added: 
    llvm/test/Transforms/IRCE/iv-for-another-loop.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/IRCE/iv-for-another-loop.ll b/llvm/test/Transforms/IRCE/iv-for-another-loop.ll
new file mode 100644
index 0000000000000..e4fba0a90f7e9
--- /dev/null
+++ b/llvm/test/Transforms/IRCE/iv-for-another-loop.ll
@@ -0,0 +1,41 @@
+; RUN: opt -S -irce -irce-print-changed-loops=true < %s | FileCheck %s
+
+target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
+target triple = "x86_64-unknown-linux-gnu"
+
+; REQUIRES: asserts
+; XFAIL: *
+
+define void @test() {
+bb:
+  br label %outer_header
+
+outer_latch:                                      ; preds = %inner_exit
+  %tmp = or i32 %tmp5, 1
+  %tmp2 = add nuw nsw i32 %tmp5, 1
+  %tmp3 = icmp eq i32 %tmp8, 0
+  br i1 %tmp3, label %ret2, label %outer_header
+
+outer_header:                                     ; preds = %outer_latch, %bb
+  %tmp5 = phi i32 [ 0, %bb ], [ %tmp2, %outer_latch ]
+  br label %inner_header
+
+inner_exit:                                       ; preds = %inner_header
+  %tmp12.lcssa = phi i32 [ %tmp12, %inner_header ]
+  %tmp7 = or i32 %tmp12.lcssa, %tmp5
+  %tmp8 = add nuw i32 %tmp12.lcssa, %tmp5
+  %tmp9 = icmp ult i32 %tmp5, 0
+  br i1 %tmp9, label %outer_latch, label %ret1
+
+ret1:                                             ; preds = %inner_exit
+  ret void
+
+inner_header:                                     ; preds = %inner_header, %outer_header
+  %tmp12 = phi i32 [ %tmp14, %inner_header ], [ 0, %outer_header ]
+  %tmp13 = or i32 %tmp12, 1
+  %tmp14 = add nuw nsw i32 %tmp12, 1
+  br i1 true, label %inner_exit, label %inner_header
+
+ret2:                                             ; preds = %outer_latch
+  ret void
+}


        


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