[llvm] c7d6a0f - [M68k] Replace `IsM680x0` with predicates `AtLeastM680x0`

[via llvm-commits]

Author: Sheng
Date: 2022-11-09T18:31:58+08:00
New Revision: c7d6a0f6bfff53f1607d48dfd8a12c1592c0af56

URL: https://github.com/llvm/llvm-project/commit/c7d6a0f6bfff53f1607d48dfd8a12c1592c0af56
DIFF: https://github.com/llvm/llvm-project/commit/c7d6a0f6bfff53f1607d48dfd8a12c1592c0af56.diff

LOG: [M68k] Replace `IsM680x0` with predicates `AtLeastM680x0`

The former is incorrect.

Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D137425

Added: 
    

Modified: 
    llvm/lib/Target/M68k/M68kInstrData.td
    llvm/lib/Target/M68k/M68kInstrInfo.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/M68k/M68kInstrData.td b/llvm/lib/Target/M68k/M68kInstrData.td
index f1f26883164e1..ed37bd1f3daeb 100644
--- a/llvm/lib/Target/M68k/M68kInstrData.td
+++ b/llvm/lib/Target/M68k/M68kInstrData.td
@@ -385,13 +385,13 @@ def MOV8cd  : MxMoveToCCRPseudo<MxOp8AddrMode_d.Op>;
 let Uses = [CCR] in {
 class MxMoveFromCCR_R
     : MxInst<(outs MxDRD16:$dst), (ins CCRC:$src), "move.w\t$src, $dst", []>,
-      Requires<[ IsM68010 ]> {
+      Requires<[ AtLeastM68010 ]> {
   let Inst = (descend 0b0100001011, MxEncAddrMode_d<"dst">.EA);
 }
 
 class MxMoveFromCCR_M<MxOperand MEMOp, MxEncMemOp DST_ENC>
     : MxInst<(outs), (ins MEMOp:$dst, CCRC:$src), "move.w\t$src, $dst", []>,
-      Requires<[ IsM68010 ]> {
+      Requires<[ AtLeastM68010 ]> {
   let Inst = (ascend
     (descend 0b0100001011, DST_ENC.EA),
     DST_ENC.Supplement

diff  --git a/llvm/lib/Target/M68k/M68kInstrInfo.td b/llvm/lib/Target/M68k/M68kInstrInfo.td
index 67500af6bfb2f..f71d55c33feca 100644
--- a/llvm/lib/Target/M68k/M68kInstrInfo.td
+++ b/llvm/lib/Target/M68k/M68kInstrInfo.td
@@ -429,12 +429,12 @@ def NearData     : Predicate<"TM.getCodeModel() == CodeModel::Small ||"
                              "TM.getCodeModel() == CodeModel::Kernel">;
 def IsPIC        : Predicate<"TM.isPositionIndependent()">;
 def IsNotPIC     : Predicate<"!TM.isPositionIndependent()">;
-def IsM68000     : Predicate<"Subtarget.IsM68000()">;
-def IsM68010     : Predicate<"Subtarget.IsM68010()">;
-def IsM68020     : Predicate<"Subtarget.IsM68020()">;
-def IsM68030     : Predicate<"Subtarget.IsM68030()">;
-def IsM68040     : Predicate<"Subtarget.IsM68040()">;
 
+def AtLeastM68000     : Predicate<"Subtarget->atLeastM68000()">;
+def AtLeastM68010     : Predicate<"Subtarget->atLeastM68010()">;
+def AtLeastM68020     : Predicate<"Subtarget->atLeastM68020()">;
+def AtLeastM68030     : Predicate<"Subtarget->atLeastM68030()">;
+def AtLeastM68040     : Predicate<"Subtarget->atLeastM68040()">;
 
 //===----------------------------------------------------------------------===//
 // Condition Codes