[PATCH] D137767: [AMDGPU] Add aperture register 64 bit variants

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 10 02:33:10 PST 2022


foad added a comment.

In D137767#3918918 <https://reviews.llvm.org/D137767#3918918>, @Pierre-vh wrote:

> In D137767#3918904 <https://reviews.llvm.org/D137767#3918904>, @foad wrote:
>
>> Why do we need the 32-bit variants?
>
> Can't this register still be used as a 32 bit operand ? (even if it's bugged) Then we need it for proper assembly/disassembly I believe, no?

OK, seems reasonable. I see we already have some asm/dis tests for 64-bit uses of these sources, e.g. `llvm/test/MC/AMDGPU/literals.s` tests `s_and_b64 s[0:1], s[0:1], src_shared_base`. How did that work? Should it work differently now?


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