[PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known

Kito Cheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 7 14:46:03 PST 2022


kito-cheng added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll:7
+; RUN: llc -mtriple=riscv64 -mattr=+v,+d -mattr=+d -riscv-v-vector-bits-min=256 -riscv-v-vector-bits-max=256 -O2 < %s \
+; RUN:    | FileCheck --check-prefix=SPILL-O2-VLEN128 %s
+
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Should be SPILL-O2-VLEN256?


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Comment at: llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll:90
+; SPILL-O2-VLEN128-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
+; SPILL-O2-VLEN128-NEXT:    csrr a1, vlenb
+; SPILL-O2-VLEN128-NEXT:    slli a1, a1, 1
----------------
I thought there should not appear any read vlenb here? since according the description I expect we could just use 256 here?


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137591/new/

https://reviews.llvm.org/D137591



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