[PATCH] D137093: [AArch64-SVE]: Force generating code compatible to streaming mode

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-addressing-modes.ll:14
+; CHECK-NEXT:    ptrue p0.s, vl2
+; CHECK-NEXT:    ld1b { z0.s }, p0/z, [x1, z0.s, sxtw]
+; CHECK-NEXT:    st1b { z0.s }, p0, [x0]
----------------
These tests contain gathers and scatters that are illegal in streaming mode, but I imagine that D136858 should fix that?


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Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:105
+
+define void @sext_v64i8_v64i16(<64 x i8>* %in, <64 x i16>* %out) #0 {
+; CHECK-LABEL: sext_v64i8_v64i16:
----------------
This is testing 512-bit vectors, but I think that @sext_v32i8_v32i16 (256-bits) should be enough. Can you remove all tests in this file where we're testing extends from vectors > 256 bits please? I think that should make the file a lot smaller!


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:138
+
+define void @sext_v128i8_v128i16(<128 x i8>* %in, <128 x i16>* %out) #0 {
+; CHECK-LABEL: sext_v128i8_v128i16:
----------------
This is testing 1024-bit vectors, but I think that @sext_v32i8_v32i16 (256-bits) should be enough. Can you remove all tests in this file where we're testing extends from vectors > 256 bits please? I think that should make the file a lot smaller!


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:269
+
+define void @sext_v64i8_v64i32(<64 x i8>* %in, <64 x i32>* %out) #0 {
+; CHECK-LABEL: sext_v64i8_v64i32:
----------------
This is testing 512-bit vectors, but I think that `@sext_v32i8_v32i32` (256-bits) should be enough. Can you remove all tests in this file where we're testing extends from vectors > 256 bits please? I think that should make the file a lot smaller!


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:520
+
+define void @sext_v32i16_v32i32(<32 x i16>* %in, <32 x i32>* %out) #0 {
+; CHECK-LABEL: sext_v32i16_v32i32:
----------------
Same here - I think you can remove this, since v32i16 > 256 bits.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:553
+
+define void @sext_v64i16_v64i32(<64 x i16>* %in, <64 x i32>* %out) #0 {
+; CHECK-LABEL: sext_v64i16_v64i32:
----------------
Same here - I think you can remove this, since v32i16 > 256 bits.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:684
+
+define void @sext_v32i16_v32i64(<32 x i16>* %in, <32 x i64>* %out) #0 {
+; CHECK-LABEL: sext_v32i16_v32i64:
----------------
Same here - I think you can remove this, since v32i16 > 256 bits.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:785
+
+define void @sext_v16i32_v16i64(<16 x i32>* %in, <16 x i64>* %out) #0 {
+; CHECK-LABEL: sext_v16i32_v16i64:
----------------
Same here - I think you can remove this, since v16i32 > 256 bits.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:818
+
+define void @sext_v32i32_v32i64(<32 x i32>* %in, <32 x i64>* %out) #0 {
+; CHECK-LABEL: sext_v32i32_v32i64:
----------------
Same here - I think you can remove this, since v32i32 > 256 bits.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:914
+
+define void @zext_v64i8_v64i16(<64 x i8>* %in, <64 x i16>* %out) #0 {
+; CHECK-LABEL: zext_v64i8_v64i16:
----------------
Same here - I think you can remove this, since v64i8 > 256 bits.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:947
+
+define void @zext_v128i8_v128i16(<128 x i8>* %in, <128 x i16>* %out) #0 {
+; CHECK-LABEL: zext_v128i8_v128i16:
----------------
Same here - I think you can remove this, since v128i8 > 256 bits.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:1078
+
+define void @zext_v64i8_v64i32(<64 x i8>* %in, <64 x i32>* %out) #0 {
+; CHECK-LABEL: zext_v64i8_v64i32:
----------------
Same here - I think you can remove this, since v64i8 > 256 bits.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137093/new/

https://reviews.llvm.org/D137093