[llvm] d9bff27 - [X86] Regenerate combine-movmsk.ll
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 13 09:12:30 PST 2022
Author: Simon Pilgrim
Date: 2022-11-13T17:12:22Z
New Revision: d9bff27024a28dc8bd5c52001fc3e2050be3d0a6
URL: https://github.com/llvm/llvm-project/commit/d9bff27024a28dc8bd5c52001fc3e2050be3d0a6
DIFF: https://github.com/llvm/llvm-project/commit/d9bff27024a28dc8bd5c52001fc3e2050be3d0a6.diff
LOG: [X86] Regenerate combine-movmsk.ll
Adds a AVX check that we lost at some point
Added:
Modified:
llvm/test/CodeGen/X86/combine-movmsk.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/combine-movmsk.ll b/llvm/test/CodeGen/X86/combine-movmsk.ll
index 0005a9968e37c..3cdde3d9ea4af 100644
--- a/llvm/test/CodeGen/X86/combine-movmsk.ll
+++ b/llvm/test/CodeGen/X86/combine-movmsk.ll
@@ -258,6 +258,13 @@ define i32 @movmskps_pow2_mask(<4 x i32> %a0) {
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: xorl $15, %eax
; SSE-NEXT: retq
+;
+; AVX-LABEL: movmskps_pow2_mask:
+; AVX: # %bb.0:
+; AVX-NEXT: vpslld $29, %xmm0, %xmm0
+; AVX-NEXT: vmovmskps %xmm0, %eax
+; AVX-NEXT: xorl $15, %eax
+; AVX-NEXT: retq
%1 = and <4 x i32> %a0, <i32 4, i32 4, i32 4, i32 4>
%2 = icmp eq <4 x i32> %1, zeroinitializer
%3 = sext <4 x i1> %2 to <4 x i32>
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