[llvm] 16d969c - [PowerPC] Use ArrayRef (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 13 16:22:39 PST 2022
Author: Kazu Hirata
Date: 2022-11-13T16:22:33-08:00
New Revision: 16d969ca8a42dbfb4b367ef710132b2a274893b6
URL: https://github.com/llvm/llvm-project/commit/16d969ca8a42dbfb4b367ef710132b2a274893b6
DIFF: https://github.com/llvm/llvm-project/commit/16d969ca8a42dbfb4b367ef710132b2a274893b6.diff
LOG: [PowerPC] Use ArrayRef (NFC)
This patch teaches getStoreOpcodesForSpillArray and
getLoadOpcodesForSpillArray to return ArrayRef. This way,
isLoadFromStackSlot and isStoreToStackSlot can use llvm::is_contained.
Added:
Modified:
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 7a7dd2f30e943..8e3a6fc3d2927 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -1068,11 +1068,7 @@ bool PPCInstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
unsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
int &FrameIndex) const {
- unsigned Opcode = MI.getOpcode();
- const unsigned *OpcodesForSpill = getLoadOpcodesForSpillArray();
- const unsigned *End = OpcodesForSpill + SOK_LastOpcodeSpill;
-
- if (End != std::find(OpcodesForSpill, End, Opcode)) {
+ if (llvm::is_contained(getLoadOpcodesForSpillArray(), MI.getOpcode())) {
// Check for the operands added by addFrameReference (the immediate is the
// offset which defaults to 0).
if (MI.getOperand(1).isImm() && !MI.getOperand(1).getImm() &&
@@ -1127,11 +1123,7 @@ bool PPCInstrInfo::isReallyTriviallyReMaterializable(
unsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
int &FrameIndex) const {
- unsigned Opcode = MI.getOpcode();
- const unsigned *OpcodesForSpill = getStoreOpcodesForSpillArray();
- const unsigned *End = OpcodesForSpill + SOK_LastOpcodeSpill;
-
- if (End != std::find(OpcodesForSpill, End, Opcode)) {
+ if (llvm::is_contained(getStoreOpcodesForSpillArray(), MI.getOpcode())) {
if (MI.getOperand(1).isImm() && !MI.getOperand(1).getImm() &&
MI.getOperand(2).isFI()) {
FrameIndex = MI.getOperand(2).getIndex();
@@ -1919,13 +1911,13 @@ unsigned PPCInstrInfo::getSpillIndex(const TargetRegisterClass *RC) const {
unsigned
PPCInstrInfo::getStoreOpcodeForSpill(const TargetRegisterClass *RC) const {
- const unsigned *OpcodesForSpill = getStoreOpcodesForSpillArray();
+ ArrayRef<unsigned> OpcodesForSpill = getStoreOpcodesForSpillArray();
return OpcodesForSpill[getSpillIndex(RC)];
}
unsigned
PPCInstrInfo::getLoadOpcodeForSpill(const TargetRegisterClass *RC) const {
- const unsigned *OpcodesForSpill = getLoadOpcodesForSpillArray();
+ ArrayRef<unsigned> OpcodesForSpill = getLoadOpcodesForSpillArray();
return OpcodesForSpill[getSpillIndex(RC)];
}
@@ -3453,12 +3445,12 @@ unsigned PPCInstrInfo::getSpillTarget() const {
return IsP10Variant ? 2 : Subtarget.hasP9Vector() ? 1 : 0;
}
-const unsigned *PPCInstrInfo::getStoreOpcodesForSpillArray() const {
- return StoreSpillOpcodesArray[getSpillTarget()];
+ArrayRef<unsigned> PPCInstrInfo::getStoreOpcodesForSpillArray() const {
+ return {StoreSpillOpcodesArray[getSpillTarget()], SOK_LastOpcodeSpill};
}
-const unsigned *PPCInstrInfo::getLoadOpcodesForSpillArray() const {
- return LoadSpillOpcodesArray[getSpillTarget()];
+ArrayRef<unsigned> PPCInstrInfo::getLoadOpcodesForSpillArray() const {
+ return {LoadSpillOpcodesArray[getSpillTarget()], SOK_LastOpcodeSpill};
}
void PPCInstrInfo::fixupIsDeadOrKill(MachineInstr *StartMI, MachineInstr *EndMI,
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.h b/llvm/lib/Target/PowerPC/PPCInstrInfo.h
index 9f150be7f746c..3bd4d0ed204b4 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.h
@@ -254,8 +254,8 @@ class PPCInstrInfo : public PPCGenInstrInfo {
bool &IsFwdFeederRegKilled,
bool &SeenIntermediateUse) const;
unsigned getSpillTarget() const;
- const unsigned *getStoreOpcodesForSpillArray() const;
- const unsigned *getLoadOpcodesForSpillArray() const;
+ ArrayRef<unsigned> getStoreOpcodesForSpillArray() const;
+ ArrayRef<unsigned> getLoadOpcodesForSpillArray() const;
unsigned getSpillIndex(const TargetRegisterClass *RC) const;
int16_t getFMAOpIdxInfo(unsigned Opcode) const;
void reassociateFMA(MachineInstr &Root, MachineCombinerPattern Pattern,
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