[PATCH] D137433: [AArch64][CodeGen] Remove redundant vector negations before concat

[Benjamin Maxwell via Phabricator via llvm-commits]

benmxwl-arm updated this revision to Diff 474229.
benmxwl-arm added a comment.
Herald added a subscriber: ecnelises.

Move to general DAG combine rather than AArch64 specific

This does not appear to regress any tests and may fix similar cases on other platforms (though as yet there are no tests to prove that).

1. Updating D137433 <https://reviews.llvm.org/D137433>: [AArch64][CodeGen] Remove redundant vector negations before concat #
2. Enter a brief description of the changes included in this update.
3. The first line is used as subject, next lines as comment.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137433/new/

https://reviews.llvm.org/D137433

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll

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