[llvm] 244ac4f - [SystemZ] add test for mergeTruncStores miscompile; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2022-11-10T14:11:32-05:00
New Revision: 244ac4fb1d7e96be9a0068751db42162772605a7

URL: https://github.com/llvm/llvm-project/commit/244ac4fb1d7e96be9a0068751db42162772605a7
DIFF: https://github.com/llvm/llvm-project/commit/244ac4fb1d7e96be9a0068751db42162772605a7.diff

LOG: [SystemZ] add test for mergeTruncStores miscompile; NFC

This is based on the example in issue #58883. I'm not sure
if the output currently shows the potential miscompile,
so we may want to adjust the test in a follow-up.

Added: 
    llvm/test/CodeGen/SystemZ/merge-stores.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/SystemZ/merge-stores.ll b/llvm/test/CodeGen/SystemZ/merge-stores.ll
new file mode 100644
index 0000000000000..bcfd0cdb4a913
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/merge-stores.ll
@@ -0,0 +1,55 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=s390x-linux-gnu -pre-RA-sched=list-ilp -disable-sched-live-uses=false | FileCheck %s
+
+target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"
+
+%struct.a = type { i16, i32 }
+
+ at e = dso_local global %struct.a { i16 9, i32 0 }, align 8
+ at f = dso_local local_unnamed_addr global ptr @e, align 8
+ at d = dso_local local_unnamed_addr global i32 0, align 4
+
+define void @h(i64 %x) #0 {
+; CHECK-LABEL: h:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lgrl %r1, f
+; CHECK-NEXT:    srlg %r0, %r2, 32
+; CHECK-NEXT:    st %r0, 0(%r1)
+; CHECK-NEXT:    lhi %r0, 0
+; CHECK-NEXT:    stg %r2, 0(%r1)
+; CHECK-NEXT:    sthrl %r0, e
+; CHECK-NEXT:    strl %r2, d
+; CHECK-NEXT:    br %r14
+  %xsh = lshr i64 %x, 32
+  %xhi = trunc i64 %xsh to i32
+  %xlo = trunc i64 %x to i32
+  %t0 = load ptr, ptr @f, align 8, !tbaa !4
+  store i32 %xhi, ptr %t0, align 4, !tbaa.struct !8
+  %f4 = getelementptr inbounds i8, ptr %t0, i64 4
+  store i32 %xlo, ptr %f4, align 4, !tbaa.struct !13
+  store i16 0, ptr @e, align 8, !tbaa !14
+  store i32 %xlo, ptr @d, align 4, !tbaa !11
+  ret void
+}
+
+attributes #0 = { "frame-pointer"="none" "target-cpu"="arch13" }
+
+!llvm.module.flags = !{!0, !1, !2}
+!llvm.ident = !{!3}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
+!1 = !{i32 8, !"PIC Level", i32 2}
+!2 = !{i32 7, !"PIE Level", i32 2}
+!3 = !{!"clang version 16.0.0 (https://github.com/llvm/llvm-project.git fd16ff3a7ef7c03932066ed992a672d7e8abd304)"}
+!4 = !{!5, !5, i64 0}
+!5 = !{!"any pointer", !6, i64 0}
+!6 = !{!"omnipotent char", !7, i64 0}
+!7 = !{!"Simple C/C++ TBAA"}
+!8 = !{i64 0, i64 2, !9, i64 4, i64 4, !11}
+!9 = !{!10, !10, i64 0}
+!10 = !{!"short", !6, i64 0}
+!11 = !{!12, !12, i64 0}
+!12 = !{!"int", !6, i64 0}
+!13 = !{i64 0, i64 4, !11}
+!14 = !{!15, !10, i64 0}
+!15 = !{!"a", !10, i64 0, !12, i64 4}