[PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64.td:483
+def FeatureSMEF16F16 : SubtargetFeature<"sme-f16f16", "HasSMEF16F16", "true",
+  "Enable SME2.1 non-widening Float16 instructions (FEAT_SME-F16F16)", []>;
+
----------------
I think this should be FEAT_SME_F16F16, instead of FEAT_SME-F16F16


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Comment at: llvm/lib/Target/AArch64/SMEInstrFormats.td:3428
                                            string mnemonic>
-   : I<(outs vector_ty:$Zd),
+   : I<!if(op{3}, (outs vector_ty:$Zd, tile_ty:$_ZAn), (outs vector_ty:$Zd)),
        (ins tile_ty:$ZAn, MatrixIndexGPR32Op12_15:$Rs, index_ty:$imm),
----------------
I couldn't seem to find any case where `op{3}` is known to be 0b1 unless I've misunderstood something?


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Comment at: llvm/test/MC/AArch64/SME2/fmla-diagnostics.s:48
 fmla za.h[w8, #0], {z0.h-z3.h}, z4.h
-// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires: sme2p1 sme-f16f16
 // CHECK-NEXT: fmla za.h[w8, #0], {z0.h-z3.h}, z4.h
----------------
It looks like these were dodgy tests before. Is it possible to change the instruction to still get the same error as before?


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Comment at: llvm/test/MC/AArch64/SME2/fmls-diagnostics.s:33
 fmls za.h[w8, #0], {z0.h-z3.h}, z4.h
-// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires: sme2p1 sme-f16f16
 // CHECK-NEXT: fmls za.h[w8, #0], {z0.h-z3.h}, z4.h
----------------
Same comment as above.


Repository:
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  https://reviews.llvm.org/D137571/new/

https://reviews.llvm.org/D137571