[PATCH] D137727: [SPARC] Simplify instruction decoder.

[James Y Knight via Phabricator via llvm-commits]

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After https://reviews.llvm.org/D137653 named sub-operands can be used
in the auto-generated instruction decoders. This allows the
auto-generated decoders to work properly, so all the hand-coded
decoders in the sparc target can be removed.

In some instances, a manually-written decoder had not been implemented
for an instruction, and thus that instruction was not decoded
properly. These have been fixed (and tests added).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D137727

Files:
  llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
  llvm/lib/Target/Sparc/SparcInstr64Bit.td
  llvm/lib/Target/Sparc/SparcInstrInfo.td
  llvm/test/MC/Disassembler/Sparc/sparc-coproc.txt
  llvm/test/MC/Disassembler/Sparc/sparc-mem.txt
  llvm/test/MC/Disassembler/Sparc/sparc-special-registers.txt
  llvm/test/MC/Disassembler/Sparc/sparc-v9.txt
  llvm/test/MC/Disassembler/Sparc/sparc.txt

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