[PATCH] D137705: [AMDGPU] Add DAG Combine for right-shift carry add to uaddo

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:3212
+    const auto Is32to64ZExt = [](SDValue V) -> bool {
+      return V->getOpcode() == ISD::ZERO_EXTEND &&
+             V->getOperand(0)->getValueType(0) == MVT::i32 &&
----------------
Could also accept 64-bit constants whose upper 32 bits are 0.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137705/new/

https://reviews.llvm.org/D137705