[PATCH] D137439: [RISCV] Remove some unneeded widening FP vector pseudo instructions. NFC
Michael Maitland via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 7 17:02:05 PST 2022
michaelmaitland requested changes to this revision.
michaelmaitland added inline comments.
This revision now requires changes to proceed.
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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:131
-def SCALAR_F16 : FPR_Info<FPR16, "F16", MxSet<16>.m>;
-def SCALAR_F32 : FPR_Info<FPR32, "F32", MxSet<32>.m>;
-def SCALAR_F64 : FPR_Info<FPR64, "F64", MxSet<64>.m>;
+def SCALAR_F16 : FPR_Info<FPR16, "F16", MxSet<16>.m, [V_MF4, V_MF2, V_M1, V_M2, V_M4]>;
+def SCALAR_F32 : FPR_Info<FPR32, "F32", MxSet<32>.m, [V_MF2, V_M1, V_M2, V_M4]>;
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Consider refactoring into `class MxSetW<int eew>`, since we are doing it for `MxSet<int eew>`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D137439/new/
https://reviews.llvm.org/D137439
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