[PATCH] D128631: [AArch64] Initial sched model for Neoverse N2

[Cullen Rhodes via Phabricator via llvm-commits]

c-rhodes added inline comments.


================
Comment at: llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-sve-instructions.s:7173
+# CHECK-NEXT:  27     11    4.50           *      U     st4b	{ z5.b, z6.b, z7.b, z8.b }, p3, [x17, x16]
+# CHECK-NEXT:  27     11    4.50           *      U     st4d	{ z0.d, z1.d, z2.d, z3.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT:  18     11    4.50           *      U     st4d	{ z0.d, z1.d, z2.d, z3.d }, p0, [x0]
----------------
dewen wrote:
> dewen wrote:
> > I found that the throughput information for this instruction (`st4d`) does not match the description in the documentation. Is there a problem with the document? 
> > {F25275327}
> > 
> > I found that the throughput information for this instruction (`st4d`) does not match the description in the documentation. Is there a problem with the document? 
> > {F25275327}
> > 
> 
> @Cullen Rhodes
> > I found that the throughput information for this instruction (`st4d`) does not match the description in the documentation. Is there a problem with the document? 
> > {F25275327}
> > 
> 
> @Cullen Rhodes

I've seen your comment, I don't have an immediate answer but will check.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128631/new/

https://reviews.llvm.org/D128631