[PATCH] D137623: [Hexagon] Use default attributes for intrinsics

[Jordan Rupprecht via Phabricator via llvm-commits]

rupprecht added a comment.

I'm still running to see if it can be further reduced, but here is what I have so far. It fails with `llc repro.ll -O1`

  ; ModuleID = '/tmp/reduced.ll'
  source_filename = "repro.cpp"
  target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
  target triple = "hexagon-unknown--elf"
  
  declare ptr @baz()
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32>, <32 x i32>, i32) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <64 x i32> @llvm.hexagon.V6.vdealvdd.128B(<32 x i32>, <32 x i32>, i32) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.vmpyiewuh.acc.128B(<32 x i32>, <32 x i32>, <32 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32>, <32 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.vshufeh.128B(<32 x i32>, <32 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.vaslw.acc.128B(<32 x i32>, <32 x i32>, i32) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.vasrw.128B(<32 x i32>, i32) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <64 x i32> @llvm.hexagon.V6.vsh.128B(<32 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.vsatwh.128B(<32 x i32>, <32 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.vabsw.128B(<32 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.vavgwrnd.128B(<32 x i32>, <32 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.vmaxw.128B(<32 x i32>, <32 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.vminw.128B(<32 x i32>, <32 x i32>) #0
  
  define i32 @snork(<64 x i32> %arg, <64 x i32> %arg1, i1 %arg2, ptr %arg3, <32 x i32> %arg4, <64 x i32> %arg5, <32 x i32> %arg6, <64 x i32> %arg7, <64 x i32> %arg8, <64 x i32> %arg9, <64 x i32> %arg10, <32 x i32> %arg11, <32 x i32> %arg12, <32 x i32> %arg13, <32 x i32> %arg14, i32 %arg15, <32 x i32> %arg16, ptr %arg17, <32 x i32> %arg18) #1 {
  bb:
    %tmp20 = icmp slt <64 x i32> zeroinitializer, %arg1
    br i1 %arg2, label %bb22, label %bb24
  
  bb22:                                             ; preds = %bb
    %tmp23 = call ptr @baz()
    br label %bb24
  
  bb24:                                             ; preds = %bb22, %bb
    %tmp25 = alloca ptr, i32 0, align 128
    store ptr %tmp25, ptr %arg3, align 4
    %tmp28 = icmp ult <64 x i32> %arg5, <i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456>
    %tmp31 = icmp ult <64 x i32> %arg5, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
    br label %bb32
  
  bb32:                                             ; preds = %bb32, %bb24
    %tmp34 = icmp ule <64 x i32> %arg7, %arg8
    %tmp35 = and <64 x i1> %tmp34, %tmp28
    %tmp36 = select <64 x i1> %tmp35, <64 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>, <64 x i32> zeroinitializer
    %tmp37 = or <64 x i32> %tmp36, <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>
    %tmp38 = select <64 x i1> %tmp31, <64 x i32> %tmp37, <64 x i32> %arg9
    %tmp39 = select <64 x i1> %tmp20, <64 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <64 x i32> zeroinitializer
    %tmp40 = call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %tmp39)
    %tmp41 = call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %tmp38)
    %tmp42 = call <32 x i32> @llvm.hexagon.V6.vmpyiewuh.acc.128B(<32 x i32> zeroinitializer, <32 x i32> %tmp40, <32 x i32> %tmp41)
    %tmp43 = call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %tmp38)
    %tmp44 = call <32 x i32> @llvm.hexagon.V6.vmpyiewuh.acc.128B(<32 x i32> zeroinitializer, <32 x i32> zeroinitializer, <32 x i32> %tmp43)
    %tmp45 = call <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32> %tmp44, <32 x i32> %tmp42)
    %tmp46 = and <64 x i32> %tmp45, %arg10
    %tmp47 = call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %tmp46)
    %tmp48 = call <32 x i32> @llvm.hexagon.V6.vminw.128B(<32 x i32> %tmp47, <32 x i32> zeroinitializer)
    %tmp49 = call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %tmp46)
    %tmp50 = call <32 x i32> @llvm.hexagon.V6.vminw.128B(<32 x i32> %tmp49, <32 x i32> zeroinitializer)
    %tmp51 = call <32 x i32> @llvm.hexagon.V6.vmaxw.128B(<32 x i32> %tmp48, <32 x i32> zeroinitializer)
    %tmp52 = call <32 x i32> @llvm.hexagon.V6.vmaxw.128B(<32 x i32> %tmp50, <32 x i32> zeroinitializer)
    %tmp53 = call <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32> %tmp52, <32 x i32> %tmp51)
    %tmp54 = call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %tmp53)
    %tmp55 = call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %tmp53)
    %tmp56 = call <64 x i32> @llvm.hexagon.V6.vdealvdd.128B(<32 x i32> %tmp55, <32 x i32> %tmp54, i32 0)
    %tmp58 = add nsw <64 x i32> %tmp56, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
    %tmp59 = call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %tmp58)
    %tmp60 = call <32 x i32> @llvm.hexagon.V6.vmpyiewuh.acc.128B(<32 x i32> zeroinitializer, <32 x i32> %arg11, <32 x i32> %tmp59)
    %tmp61 = call <32 x i32> @llvm.hexagon.V6.vavgwrnd.128B(<32 x i32> %tmp60, <32 x i32> zeroinitializer)
    %tmp62 = call <32 x i32> @llvm.hexagon.V6.vasrw.128B(<32 x i32> %tmp61, i32 0)
    %tmp64 = call <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32> zeroinitializer, <32 x i32> %tmp62)
    %tmp65 = call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %tmp64)
    %tmp66 = call <32 x i32> @llvm.hexagon.V6.vshufeh.128B(<32 x i32> %arg13, <32 x i32> %tmp65)
    %tmp67 = call <64 x i32> @llvm.hexagon.V6.vsh.128B(<32 x i32> %tmp66)
    %tmp68 = call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %tmp67)
    %tmp69 = call <32 x i32> @llvm.hexagon.V6.vsatwh.128B(<32 x i32> zeroinitializer, <32 x i32> %tmp68)
    %tmp71 = call <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32> %arg14, <32 x i32> %tmp69, i32 0)
    %tmp72 = call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %tmp71)
    %tmp73 = call <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32> zeroinitializer, <32 x i32> %tmp72, i32 0)
    %tmp76 = getelementptr inbounds i16, ptr null, i32 %arg15
    store <32 x i32> %arg16, ptr %arg17, align 2
    %tmp77 = getelementptr inbounds i16, ptr %tmp76, i32 64
    store <32 x i32> %arg18, ptr %tmp77, align 2
    %tmp78 = call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %tmp73)
    %tmp79 = getelementptr inbounds i16, ptr %tmp76, i32 128
    store <32 x i32> %tmp78, ptr %tmp79, align 2
    br label %bb32
  }
  
  ; uselistorder directives
  uselistorder <64 x i32> zeroinitializer, { 0, 2, 1 }
  uselistorder <32 x i32> zeroinitializer, { 1, 2, 0, 3, 4, 5, 6, 7, 8, 9, 10, 11 }
  
  attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) }
  attributes #1 = { "target-features"="+hvx-length128b,+long-calls,+hvxv62" }


Repository:
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https://reviews.llvm.org/D137623