[PATCH] D137619: [AArch64][SVE2] Add the SVE2.1 permute vector elements (quadword) instructions

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


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Comment at: llvm/lib/Target/AArch64/SMEInstrFormats.td:1086
 
-class sve2_clamp<string asm, bits<2> sz, bit U, ZPRRegOp zpr_ty>
-    : I<(outs zpr_ty:$Zd), (ins zpr_ty:$Zn, zpr_ty:$Zm, zpr_ty:$_Zd),
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Not really against it but is there a good reason to move this code rather than adding you new `sve2p1_tblq` multiclass here instead?


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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:9529
+multiclass sve2_clamp<string asm, bits<4> opc, SDPatternOperator op> {
+  // bits 13-11 = 0
+  def _B : sve2_permuteq_or_clamp<asm, 0b00, opc, ZPR8,  ZPR8>;
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I don't think this comment means anything because those bits are passed in via `opc`.


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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:9542-9547
+multiclass sve2p1_permute_vec_elems_q<bits<4> opc, string mnemonic> {
+  def _B : sve2_permuteq_or_clamp<mnemonic, 0b00, opc, ZPR8,  ZPR8>;
+  def _H : sve2_permuteq_or_clamp<mnemonic, 0b01, opc, ZPR16, ZPR16>;
+  def _S : sve2_permuteq_or_clamp<mnemonic, 0b10, opc, ZPR32, ZPR32>;
+  def _D : sve2_permuteq_or_clamp<mnemonic, 0b11, opc, ZPR64, ZPR64>;
+}
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Can you reuse `sve2_clamp` here and pass in `null_frag`? I suppose this depends on whether these permute instructions are going to need floating point patterns but we can alway separate them later if that turns out to be true.


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  https://reviews.llvm.org/D137619/new/

https://reviews.llvm.org/D137619