[PATCH] D137721: [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0
chenglin.bi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 9 23:16:02 PST 2022
bcl5980 added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:8553
+ // The leaf node must be XOR
+ if (N->getOpcode() == ISD::XOR) {
+ WorkList.push_back(std::make_pair(N->getOperand(0), N->getOperand(1)));
----------------
Can ISD::SUB be leaf node also?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D137721/new/
https://reviews.llvm.org/D137721
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