[llvm] 6373f8c - [RISCV] Add BREV8 to hasAllWUsers in RISCVSExtWRemoval.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-11-13T11:59:33-08:00
New Revision: 6373f8c31720e7d9712acc5914ed9176df5dabde

URL: https://github.com/llvm/llvm-project/commit/6373f8c31720e7d9712acc5914ed9176df5dabde
DIFF: https://github.com/llvm/llvm-project/commit/6373f8c31720e7d9712acc5914ed9176df5dabde.diff

LOG: [RISCV] Add BREV8 to hasAllWUsers in RISCVSExtWRemoval.

This instruction reverses the bits in each byte. Since we're only
interested in whether the upper 32 bits are used or not, we can
look through them to check their users.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp b/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
index 169d1866df58..62154c737da0 100644
--- a/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
+++ b/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
@@ -198,6 +198,7 @@ static bool hasAllWUsers(const MachineInstr &OrigMI, MachineRegisterInfo &MRI) {
       case RISCV::XORI:
 
       case RISCV::ANDN:
+      case RISCV::BREV8:
       case RISCV::CLMUL:
       case RISCV::ORC_B:
       case RISCV::ORN: