[PATCH] D137623: [Hexagon] Use default attributes for intrinsics

[Jordan Rupprecht via Phabricator via llvm-commits]

rupprecht added a comment.

Here's a different reduction that fails at `llc -O0` on both sides but is now also failing at `-O1/-O2`:

  ; ModuleID = '/tmp/reduced.ll'
  source_filename = "reduced.ll"
  target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
  target triple = "hexagon-unknown--elf"
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32>, <32 x i32>, i32) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <64 x i32> @llvm.hexagon.V6.vdealvdd.128B(<32 x i32>, <32 x i32>, i32) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.vmpyiewuh.acc.128B(<32 x i32>, <32 x i32>, <32 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32>, <32 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <64 x i32> @llvm.hexagon.V6.vsh.128B(<32 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.vsatwh.128B(<32 x i32>, <32 x i32>) #0
  
  ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
  declare <32 x i32> @llvm.hexagon.V6.vminw.128B(<32 x i32>, <32 x i32>) #0
  
  define i32 @widget(i32 %arg, ptr %arg1, <64 x i32> %arg2, <32 x i32> %arg3, <64 x i32> %arg4, <32 x i32> %arg5, <64 x i32> %arg6) #1 {
  bb:
    %tmp = xor <64 x i32> zeroinitializer, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
    %tmp7 = alloca ptr, i32 %arg, align 128
    %tmp8 = call <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32> zeroinitializer, <32 x i32> zeroinitializer)
    %tmp9 = icmp ult <64 x i32> %arg2, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
    %tmp10 = icmp ult <64 x i32> %arg2, <i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024, i32 1024>
    %tmp11 = icmp ult <64 x i32> %arg2, <i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096, i32 4096>
    %tmp12 = call <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32> zeroinitializer, <32 x i32> zeroinitializer)
    %tmp13 = icmp ult <64 x i32> zeroinitializer, zeroinitializer
    %tmp14 = call <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32> zeroinitializer, <32 x i32> zeroinitializer)
    %tmp15 = icmp ult <64 x i32> %arg2, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
    %tmp16 = icmp sgt <64 x i32> %arg2, zeroinitializer
    %tmp17 = call <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32> zeroinitializer, <32 x i32> zeroinitializer)
    br label %bb18
  
  bb18:                                             ; preds = %bb18, %bb
    %tmp19 = phi i32 [ %tmp76, %bb18 ], [ 0, %bb ]
    %tmp20 = icmp ule <64 x i32> %tmp12, zeroinitializer
    %tmp21 = and <64 x i1> %tmp20, %tmp11
    %tmp22 = select <64 x i1> %tmp9, <64 x i32> <i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456, i32 268435456>, <64 x i32> zeroinitializer
    %tmp23 = or <64 x i32> %tmp22, <i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304>
    %tmp24 = select <64 x i1> %tmp10, <64 x i32> %tmp23, <64 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
    %tmp25 = or <64 x i32> %tmp24, <i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576>
    %tmp26 = select <64 x i1> %tmp21, <64 x i32> %tmp25, <64 x i32> zeroinitializer
    %tmp27 = select <64 x i1> %tmp13, <64 x i32> <i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288>, <64 x i32> %tmp26
    %tmp28 = or <64 x i32> %tmp27, <i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64>
    %tmp29 = select <64 x i1> %tmp15, <64 x i32> %tmp28, <64 x i32> zeroinitializer
    %tmp30 = or <64 x i32> %tmp29, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
    %tmp31 = add <64 x i32> zeroinitializer, <i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840>
    %tmp32 = call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %tmp30)
    %tmp33 = call <32 x i32> @llvm.hexagon.V6.vmpyiewuh.acc.128B(<32 x i32> zeroinitializer, <32 x i32> zeroinitializer, <32 x i32> %tmp32)
    %tmp34 = call <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32> %tmp33, <32 x i32> zeroinitializer, i32 0)
    %tmp35 = getelementptr i16, ptr null, i32 %tmp19
    %tmp36 = getelementptr i16, ptr %tmp35, i32 64
    store <32 x i32> zeroinitializer, ptr %tmp36, align 2
    %tmp37 = call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %tmp34)
    %tmp38 = getelementptr i16, ptr %tmp35, i32 128
    store <32 x i32> zeroinitializer, ptr %tmp38, align 2
    %tmp39 = getelementptr i16, ptr %tmp35, i32 192
    store <32 x i32> %tmp37, ptr %tmp39, align 2
    %tmp40 = getelementptr i16, ptr %tmp7, i32 %tmp19
    %tmp41 = load <32 x i32>, ptr %tmp40, align 128
    %tmp42 = call <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32> zeroinitializer, <32 x i32> zeroinitializer, i32 0)
    %tmp43 = icmp ule <64 x i32> %tmp12, %tmp42
    %tmp44 = and <64 x i1> %tmp43, %tmp11
    %tmp45 = icmp ule <64 x i32> %tmp14, %arg4
    %tmp46 = icmp ule <64 x i32> %tmp17, %arg6
    %tmp47 = and <64 x i1> %tmp46, %tmp16
    %tmp48 = select <64 x i1> %tmp10, <64 x i32> <i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304, i32 4194304>, <64 x i32> zeroinitializer
    %tmp49 = or <64 x i32> %tmp48, <i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576, i32 1048576>
    %tmp50 = select <64 x i1> %tmp44, <64 x i32> %tmp49, <64 x i32> zeroinitializer
    %tmp51 = select <64 x i1> %tmp13, <64 x i32> <i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288, i32 524288>, <64 x i32> %tmp50
    %tmp52 = select <64 x i1> %tmp45, <64 x i32> zeroinitializer, <64 x i32> %tmp51
    %tmp53 = or <64 x i32> %tmp52, <i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64, i32 64>
    %tmp54 = select <64 x i1> %tmp47, <64 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>, <64 x i32> %tmp53
    %tmp55 = icmp uge <64 x i32> %arg2, %tmp8
    %tmp56 = zext <64 x i1> %tmp55 to <64 x i32>
    %tmp57 = or <64 x i32> %tmp54, %tmp56
    %tmp58 = call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %tmp57)
    %tmp59 = call <32 x i32> @llvm.hexagon.V6.vmpyiewuh.acc.128B(<32 x i32> zeroinitializer, <32 x i32> zeroinitializer, <32 x i32> %tmp58)
    %tmp60 = call <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32> %tmp59, <32 x i32> zeroinitializer)
    %tmp61 = and <64 x i32> %tmp60, %tmp
    %tmp62 = call <64 x i32> @llvm.hexagon.V6.vcombine.128B(<32 x i32> zeroinitializer, <32 x i32> %arg3)
    %tmp63 = call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %tmp61)
    %tmp64 = call <32 x i32> @llvm.hexagon.V6.vminw.128B(<32 x i32> %tmp63, <32 x i32> zeroinitializer)
    %tmp65 = call <64 x i32> @llvm.hexagon.V6.vdealvdd.128B(<32 x i32> %tmp64, <32 x i32> zeroinitializer, i32 0)
    %tmp66 = add <64 x i32> %tmp65, <i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840, i32 -3840>
    %tmp67 = call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %tmp66)
    %tmp68 = call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>)
    %tmp69 = call <32 x i32> @llvm.hexagon.V6.vmpyiewuh.acc.128B(<32 x i32> zeroinitializer, <32 x i32> %arg5, <32 x i32> %tmp67)
    %tmp70 = call <64 x i32> @llvm.hexagon.V6.vsh.128B(<32 x i32> %tmp69)
    %tmp71 = add <64 x i32> %tmp70, %tmp62
    %tmp72 = call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %tmp71)
    %tmp73 = call <32 x i32> @llvm.hexagon.V6.vsatwh.128B(<32 x i32> %tmp72, <32 x i32> zeroinitializer)
    %tmp74 = call <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32> %tmp73, <32 x i32> %tmp68, i32 0)
    %tmp75 = call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %tmp74)
    store <32 x i32> %tmp75, ptr %arg1, align 2
    %tmp76 = add i32 %tmp19, 1
    br label %bb18
  }
  
  attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) }
  attributes #1 = { "target-features"="+hvx-length128b,+long-calls,+hvxv62" }


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D137623/new/

https://reviews.llvm.org/D137623