[PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 10 11:08:44 PST 2022
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp:853
+// %26.sub1:vreg_64, %54:vgpr_32, killed $vcc, implicit $exec
void SIPeepholeSDWA::pseudoOpConvertToVOP2(MachineInstr &MI,
const GCNSubtarget &ST) const {
----------------
Only converting the low half to VOP2 is somewhat surprising given the name, but I guess this makes sense
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D136663/new/
https://reviews.llvm.org/D136663
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