[PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly

Mon Nov 7 09:52:23 PST 2022

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This patch adds a new feature flag:
sme-f16f16 to represent FEAT_SME-F16F16

This patch add the following instructions:
SME2.1 stand alone instructions:

  MOVAZ (array to vector, four registers): Move and zero four ZA single-vector groups to vector registers.
        (array to vector, two registers): Move and zero two ZA single-vector groups to vector registers.
        (tile to vector, four registers): Move and zero four ZA tile slices to vector registers.
        (tile to vector, single): Move and zero ZA tile slice to vector register.
        (tile to vector, two registers): Move and zero two ZA tile slices to vector registers.

  LUTI2 (Strided four registers): Lookup table read with 2-bit indexes.
        (Strided two registers): Lookup table read with 2-bit indexes.

  LUTI4 (Strided four registers): Lookup table read with 4-bit indexes.
        (Strided two registers): Lookup table read with 4-bit indexes.

  ZERO (double-vector): Zero ZA double-vector groups.
       (quad-vector): Zero ZA quad-vector groups.
       (single-vector): Zero ZA single-vector groups.

SME2p1 and SME-F16F16:
 All instructions are half precision elements:

  FADD: Floating-point add multi-vector to ZA array vector accumulators.

  FSUB: Floating-point subtract multi-vector from ZA array vector accumulators.

  FMLA (multiple and indexed vector): Multi-vector floating-point fused multiply-add by indexed element.
       (multiple and single vector): Multi-vector floating-point fused multiply-add by vector.
       (multiple vectors): Multi-vector floating-point fused multiply-add.

  FMLS (multiple and indexed vector): Multi-vector floating-point fused multiply-subtract by indexed element.
       (multiple and single vector): Multi-vector floating-point fused multiply-subtract by vector.
       (multiple vectors): Multi-vector floating-point fused multiply-subtract.

  FCVT (widening): Multi-vector floating-point convert from half-precision to single-precision (in-order).

  FCVTL: Multi-vector floating-point convert from half-precision to deinterleaved single-precision.

  FMOPA (non-widening): Floating-point outer product and accumulate.

  FMOPS (non-widening): Floating-point outer product and subtract.

SME2p1 and B16B16:

  BFADD: BFloat16 floating-point add multi-vector to ZA array vector accumulators.

  BFSUB: BFloat16 floating-point subtract multi-vector from ZA array vector accumulators.

  BFCLAMP: Multi-vector BFloat16 floating-point clamp to minimum/maximum number.

  BFMLA (multiple and indexed vector): Multi-vector BFloat16 floating-point fused multiply-add by indexed element.
        (multiple and single vector): Multi-vector BFloat16 floating-point fused multiply-add by vector.
        (multiple vectors): Multi-vector BFloat16 floating-point fused multiply-add.

  BFMLS (multiple and indexed vector): Multi-vector BFloat16 floating-point fused multiply-subtract by indexed element.
        (multiple and single vector): Multi-vector BFloat16 floating-point fused multiply-subtract by vector.
        (multiple vectors): Multi-vector BFloat16 floating-point fused multiply-subtract.

  BFMAX (multiple and single vector): Multi-vector BFloat16 floating-point maximum by vector.
        (multiple vectors): Multi-vector BFloat16 floating-point maximum.

  BFMAXNM (multiple and single vector): Multi-vector BFloat16 floating-point maximum number by vector.
          (multiple vectors): Multi-vector BFloat16 floating-point maximum number.

  BFMIN (multiple and single vector): Multi-vector BFloat16 floating-point minimum by vector.
        (multiple vectors): Multi-vector BFloat16 floating-point minimum.

  BFMINNM (multiple and single vector): Multi-vector BFloat16 floating-point minimum number by vector.
          (multiple vectors): Multi-vector BFloat16 floating-point minimum number.

  BFMOPA (non-widening): BFloat16 floating-point outer product and accumulate.

  BFMOPS (non-widening): BFloat16 floating-point outer product and subtract.

The reference can be found here:

https://developer.arm.com/documentation/ddi0602/2022-09

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D137571

Files:
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/include/llvm/Support/AArch64TargetParser.h
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64RegisterInfo.td
  llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
  llvm/lib/Target/AArch64/AArch64SchedA64FX.td
  llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  llvm/lib/Target/AArch64/SMEInstrFormats.td
  llvm/test/MC/AArch64/SME2/fmla-diagnostics.s
  llvm/test/MC/AArch64/SME2/fmls-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/bfadd-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/bfadd.s
  llvm/test/MC/AArch64/SME2p1/bfclamp-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/bfclamp.s
  llvm/test/MC/AArch64/SME2p1/bfmax-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/bfmax.s
  llvm/test/MC/AArch64/SME2p1/bfmaxnm-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/bfmaxnm.s
  llvm/test/MC/AArch64/SME2p1/bfmin-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/bfmin.s
  llvm/test/MC/AArch64/SME2p1/bfminnm-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/bfminnm.s
  llvm/test/MC/AArch64/SME2p1/bfmla-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/bfmla.s
  llvm/test/MC/AArch64/SME2p1/bfmls-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/bfmls.s
  llvm/test/MC/AArch64/SME2p1/bfmopa-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/bfmopa.s
  llvm/test/MC/AArch64/SME2p1/bfmops-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/bfmops.s
  llvm/test/MC/AArch64/SME2p1/bfsub-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/bfsub.s
  llvm/test/MC/AArch64/SME2p1/fadd-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/fadd.s
  llvm/test/MC/AArch64/SME2p1/fcvt-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/fcvt.s
  llvm/test/MC/AArch64/SME2p1/fcvtl-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/fcvtl.s
  llvm/test/MC/AArch64/SME2p1/fmla-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/fmla.s
  llvm/test/MC/AArch64/SME2p1/fmls-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/fmls.s
  llvm/test/MC/AArch64/SME2p1/fmopa-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/fmopa.s
  llvm/test/MC/AArch64/SME2p1/fmops-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/fmops.s
  llvm/test/MC/AArch64/SME2p1/fsub-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/fsub.s
  llvm/test/MC/AArch64/SME2p1/luti2-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/luti2.s
  llvm/test/MC/AArch64/SME2p1/luti4-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/luti4.s
  llvm/test/MC/AArch64/SME2p1/movaz-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/movaz.s
  llvm/test/MC/AArch64/SME2p1/zero-diagnostics.s
  llvm/test/MC/AArch64/SME2p1/zero.s
  llvm/unittests/Support/TargetParserTest.cpp

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