[llvm] d35fcf0 - [WebAssembly] Use default attributes for intrinsics
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 7 08:09:15 PST 2022
Author: Nikita Popov
Date: 2022-11-07T17:05:36+01:00
New Revision: d35fcf0e97e7bb02381506a71e61ec282b292c50
URL: https://github.com/llvm/llvm-project/commit/d35fcf0e97e7bb02381506a71e61ec282b292c50
DIFF: https://github.com/llvm/llvm-project/commit/d35fcf0e97e7bb02381506a71e61ec282b292c50.diff
LOG: [WebAssembly] Use default attributes for intrinsics
This switches wasm intrinsics to use default attributes,
i.e. nofree, nosync, nocallback and willreturn. Especially
willreturn will be required to avoid optimization regressions
in the future.
The attributes are omitted from the trapping fptoi intrinsics
(where I assume trapping is considered well-defined, and as such
these aren't willreturn), the throw/rethrow intrinsics (which
will unwind) and the atomic intrinsics (which aren't nosync).
Differential Revision: https://reviews.llvm.org/D137551
Added:
Modified:
llvm/include/llvm/IR/IntrinsicsWebAssembly.td
llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
index 3b28f958020ce..b8750abca2050 100644
--- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -19,64 +19,69 @@ let TargetPrefix = "wasm" in { // All intrinsics start with "llvm.wasm.".
// Query the current memory size, and increase the current memory size.
// Note that memory.size is not IntrNoMem because it must be sequenced with
// respect to memory.grow calls.
-def int_wasm_memory_size : Intrinsic<[llvm_anyint_ty],
- [llvm_i32_ty],
- [IntrReadMem]>;
-def int_wasm_memory_grow : Intrinsic<[llvm_anyint_ty],
- [llvm_i32_ty, LLVMMatchType<0>],
- []>;
+def int_wasm_memory_size :
+ DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_i32_ty], [IntrReadMem]>;
+def int_wasm_memory_grow :
+ DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_i32_ty, LLVMMatchType<0>], []>;
//===----------------------------------------------------------------------===//
// ref.null intrinsics
//===----------------------------------------------------------------------===//
-def int_wasm_ref_null_extern : Intrinsic<[llvm_externref_ty], [], [IntrNoMem]>;
-def int_wasm_ref_null_func : Intrinsic<[llvm_funcref_ty], [], [IntrNoMem]>;
-def int_wasm_ref_is_null_extern : Intrinsic<[llvm_i32_ty], [llvm_externref_ty],
- [IntrNoMem], "llvm.wasm.ref.is_null.extern">;
-def int_wasm_ref_is_null_func : Intrinsic<[llvm_i32_ty], [llvm_funcref_ty],
- [IntrNoMem], "llvm.wasm.ref.is_null.func">;
+def int_wasm_ref_null_extern :
+ DefaultAttrsIntrinsic<[llvm_externref_ty], [], [IntrNoMem]>;
+def int_wasm_ref_null_func :
+ DefaultAttrsIntrinsic<[llvm_funcref_ty], [], [IntrNoMem]>;
+def int_wasm_ref_is_null_extern :
+ DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_externref_ty], [IntrNoMem],
+ "llvm.wasm.ref.is_null.extern">;
+def int_wasm_ref_is_null_func :
+ DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_funcref_ty],
+ [IntrNoMem], "llvm.wasm.ref.is_null.func">;
//===----------------------------------------------------------------------===//
// Table intrinsics
//===----------------------------------------------------------------------===//
-def int_wasm_table_set_externref : Intrinsic<[],
- [llvm_table_ty, llvm_i32_ty, llvm_externref_ty],
- [IntrWriteMem]>;
-def int_wasm_table_set_funcref : Intrinsic<[],
- [llvm_table_ty, llvm_i32_ty, llvm_funcref_ty],
- [IntrWriteMem]>;
-
-def int_wasm_table_get_externref : Intrinsic<[llvm_externref_ty],
- [llvm_table_ty, llvm_i32_ty],
- [IntrReadMem]>;
-def int_wasm_table_get_funcref : Intrinsic<[llvm_funcref_ty],
- [llvm_table_ty, llvm_i32_ty],
- [IntrReadMem]>;
+def int_wasm_table_set_externref :
+ DefaultAttrsIntrinsic<[], [llvm_table_ty, llvm_i32_ty, llvm_externref_ty],
+ [IntrWriteMem]>;
+def int_wasm_table_set_funcref :
+ DefaultAttrsIntrinsic<[], [llvm_table_ty, llvm_i32_ty, llvm_funcref_ty],
+ [IntrWriteMem]>;
+
+def int_wasm_table_get_externref :
+ DefaultAttrsIntrinsic<[llvm_externref_ty], [llvm_table_ty, llvm_i32_ty],
+ [IntrReadMem]>;
+def int_wasm_table_get_funcref :
+ DefaultAttrsIntrinsic<[llvm_funcref_ty], [llvm_table_ty, llvm_i32_ty],
+ [IntrReadMem]>;
// Query the current table size, and increase the current table size.
-def int_wasm_table_size : Intrinsic<[llvm_i32_ty],
- [llvm_table_ty],
- [IntrReadMem]>;
-def int_wasm_table_copy : Intrinsic<[],
- [llvm_table_ty, llvm_table_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
- []>;
-def int_wasm_table_grow_externref : Intrinsic<[llvm_i32_ty],
- [llvm_table_ty, llvm_externref_ty, llvm_i32_ty],
- []>;
-def int_wasm_table_grow_funcref : Intrinsic<[llvm_i32_ty],
- [llvm_table_ty, llvm_funcref_ty, llvm_i32_ty],
- []>;
-def int_wasm_table_fill_externref : Intrinsic<[],
- [llvm_table_ty, llvm_i32_ty, llvm_externref_ty, llvm_i32_ty],
- []>;
-def int_wasm_table_fill_funcref : Intrinsic<[],
- [llvm_table_ty, llvm_i32_ty, llvm_funcref_ty, llvm_i32_ty],
- []>;
+def int_wasm_table_size :
+ DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_table_ty], [IntrReadMem]>;
+def int_wasm_table_copy :
+ DefaultAttrsIntrinsic<[],
+ [llvm_table_ty, llvm_table_ty, llvm_i32_ty, llvm_i32_ty,
+ llvm_i32_ty], []>;
+def int_wasm_table_grow_externref :
+ DefaultAttrsIntrinsic<[llvm_i32_ty],
+ [llvm_table_ty, llvm_externref_ty, llvm_i32_ty], []>;
+def int_wasm_table_grow_funcref :
+ DefaultAttrsIntrinsic<[llvm_i32_ty],
+ [llvm_table_ty, llvm_funcref_ty, llvm_i32_ty], []>;
+def int_wasm_table_fill_externref :
+ DefaultAttrsIntrinsic<[],
+ [llvm_table_ty, llvm_i32_ty, llvm_externref_ty,
+ llvm_i32_ty], []>;
+def int_wasm_table_fill_funcref :
+ DefaultAttrsIntrinsic<[],
+ [llvm_table_ty, llvm_i32_ty, llvm_funcref_ty,
+ llvm_i32_ty], []>;
//===----------------------------------------------------------------------===//
// Trapping float-to-int conversions
//===----------------------------------------------------------------------===//
+// These don't use default attributes, because they are not willreturn.
def int_wasm_trunc_signed : Intrinsic<[llvm_anyint_ty],
[llvm_anyfloat_ty],
[IntrNoMem]>;
@@ -88,12 +93,12 @@ def int_wasm_trunc_unsigned : Intrinsic<[llvm_anyint_ty],
// Saturating float-to-int conversions
//===----------------------------------------------------------------------===//
-def int_wasm_trunc_saturate_signed : Intrinsic<[llvm_anyint_ty],
- [llvm_anyfloat_ty],
- [IntrNoMem, IntrSpeculatable]>;
-def int_wasm_trunc_saturate_unsigned : Intrinsic<[llvm_anyint_ty],
- [llvm_anyfloat_ty],
- [IntrNoMem, IntrSpeculatable]>;
+def int_wasm_trunc_saturate_signed :
+ DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty],
+ [IntrNoMem, IntrSpeculatable]>;
+def int_wasm_trunc_saturate_unsigned :
+ DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty],
+ [IntrNoMem, IntrSpeculatable]>;
//===----------------------------------------------------------------------===//
// Exception handling intrinsics
@@ -108,32 +113,35 @@ def int_wasm_rethrow : Intrinsic<[], [], [Throws, IntrNoReturn]>;
// Since wasm does not use landingpad instructions, these instructions return
// exception pointer and selector values until we lower them in WasmEHPrepare.
-def int_wasm_get_exception : Intrinsic<[llvm_ptr_ty], [llvm_token_ty],
- [IntrHasSideEffects]>;
-def int_wasm_get_ehselector : Intrinsic<[llvm_i32_ty], [llvm_token_ty],
- [IntrHasSideEffects]>;
+def int_wasm_get_exception :
+ DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_token_ty], [IntrHasSideEffects]>;
+def int_wasm_get_ehselector :
+ DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_token_ty], [IntrHasSideEffects]>;
// wasm.catch returns the pointer to the exception object caught by wasm 'catch'
// instruction. This returns a single pointer, which is the case for C++
// exceptions. The immediate argument is an index to for a tag, which is 0 for
// C++ exceptions.
-def int_wasm_catch : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty],
- [IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
+def int_wasm_catch :
+ DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_i32_ty],
+ [IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
// WebAssembly EH must maintain the landingpads in the order assigned to them
// by WasmEHPrepare pass to generate landingpad table in EHStreamer. This is
// used in order to give them the indices in WasmEHPrepare.
-def int_wasm_landingpad_index: Intrinsic<[], [llvm_token_ty, llvm_i32_ty],
- [IntrNoMem, ImmArg<ArgIndex<1>>]>;
+def int_wasm_landingpad_index :
+ DefaultAttrsIntrinsic<[], [llvm_token_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<1>>]>;
// Returns LSDA address of the current function.
-def int_wasm_lsda : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
+def int_wasm_lsda : DefaultAttrsIntrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
//===----------------------------------------------------------------------===//
// Atomic intrinsics
//===----------------------------------------------------------------------===//
// wait / notify
+// These don't use default attributes, because they are not nosync.
def int_wasm_memory_atomic_wait32 :
Intrinsic<[llvm_i32_ty],
[LLVMPointerType<llvm_i32_ty>, llvm_i32_ty, llvm_i64_ty],
@@ -157,152 +165,153 @@ def int_wasm_memory_atomic_notify:
//===----------------------------------------------------------------------===//
def int_wasm_swizzle :
- Intrinsic<[llvm_v16i8_ty],
- [llvm_v16i8_ty, llvm_v16i8_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty],
+ [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_shuffle :
- Intrinsic<[llvm_v16i8_ty],
- [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty, llvm_i32_ty,
- llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
- llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
- llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty],
+ [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty,
+ llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
+ llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
+ llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
+ llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_sub_sat_signed :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_sub_sat_unsigned :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_avgr_unsigned :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_bitselect :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_anytrue :
- Intrinsic<[llvm_i32_ty],
- [llvm_anyvector_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_i32_ty],
+ [llvm_anyvector_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_alltrue :
- Intrinsic<[llvm_i32_ty],
- [llvm_anyvector_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_i32_ty],
+ [llvm_anyvector_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_bitmask :
- Intrinsic<[llvm_i32_ty],
- [llvm_anyvector_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_i32_ty],
+ [llvm_anyvector_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_dot :
- Intrinsic<[llvm_v4i32_ty],
- [llvm_v8i16_ty, llvm_v8i16_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v4i32_ty],
+ [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_narrow_signed :
- Intrinsic<[llvm_anyvector_ty],
- [llvm_anyvector_ty, LLVMMatchType<1>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [llvm_anyvector_ty, LLVMMatchType<1>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_narrow_unsigned :
- Intrinsic<[llvm_anyvector_ty],
- [llvm_anyvector_ty, LLVMMatchType<1>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [llvm_anyvector_ty, LLVMMatchType<1>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_q15mulr_sat_signed :
- Intrinsic<[llvm_v8i16_ty],
- [llvm_v8i16_ty, llvm_v8i16_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v8i16_ty],
+ [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_pmin :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_pmax :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_extadd_pairwise_signed :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMSubdivide2VectorType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMSubdivide2VectorType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_extadd_pairwise_unsigned :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMSubdivide2VectorType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMSubdivide2VectorType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
//===----------------------------------------------------------------------===//
// Relaxed SIMD intrinsics (experimental)
//===----------------------------------------------------------------------===//
def int_wasm_fma :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_fms :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_laneselect :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_swizzle :
- Intrinsic<[llvm_v16i8_ty],
- [llvm_v16i8_ty, llvm_v16i8_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty],
+ [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_min :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_max :
- Intrinsic<[llvm_anyvector_ty],
- [LLVMMatchType<0>, LLVMMatchType<0>],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyvector_ty],
+ [LLVMMatchType<0>, LLVMMatchType<0>],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_trunc_signed:
- Intrinsic<[llvm_v4i32_ty],
- [llvm_v4f32_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v4i32_ty],
+ [llvm_v4f32_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_trunc_unsigned:
- Intrinsic<[llvm_v4i32_ty],
- [llvm_v4f32_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v4i32_ty],
+ [llvm_v4f32_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_trunc_signed_zero:
- Intrinsic<[llvm_v4i32_ty],
- [llvm_v2f64_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v4i32_ty],
+ [llvm_v2f64_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_trunc_unsigned_zero:
- Intrinsic<[llvm_v4i32_ty],
- [llvm_v2f64_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v4i32_ty],
+ [llvm_v2f64_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_q15mulr_signed:
- Intrinsic<[llvm_v8i16_ty],
- [llvm_v8i16_ty, llvm_v8i16_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v8i16_ty],
+ [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_dot_i8x16_i7x16_signed:
- Intrinsic<[llvm_v8i16_ty],
- [llvm_v16i8_ty, llvm_v16i8_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v8i16_ty],
+ [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_dot_i8x16_i7x16_add_signed:
- Intrinsic<[llvm_v4i32_ty],
- [llvm_v16i8_ty, llvm_v16i8_ty, llvm_v4i32_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v4i32_ty],
+ [llvm_v16i8_ty, llvm_v16i8_ty, llvm_v4i32_ty],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_relaxed_dot_bf16x8_add_f32:
- Intrinsic<[llvm_v4f32_ty],
- [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4f32_ty],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_v4f32_ty],
+ [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4f32_ty],
+ [IntrNoMem, IntrSpeculatable]>;
//===----------------------------------------------------------------------===//
@@ -310,18 +319,18 @@ def int_wasm_relaxed_dot_bf16x8_add_f32:
//===----------------------------------------------------------------------===//
def int_wasm_tls_size :
- Intrinsic<[llvm_anyint_ty],
- [],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyint_ty],
+ [],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_tls_align :
- Intrinsic<[llvm_anyint_ty],
- [],
- [IntrNoMem, IntrSpeculatable]>;
+ DefaultAttrsIntrinsic<[llvm_anyint_ty],
+ [],
+ [IntrNoMem, IntrSpeculatable]>;
def int_wasm_tls_base :
- Intrinsic<[llvm_ptr_ty],
- [],
- [IntrReadMem]>;
+ DefaultAttrsIntrinsic<[llvm_ptr_ty],
+ [],
+ [IntrReadMem]>;
} // TargetPrefix = "wasm"
diff --git a/llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll b/llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
index 446c298865ade..beb1b6d7ec8d5 100644
--- a/llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
+++ b/llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
@@ -109,7 +109,7 @@ catch: ; preds = %catch.start
catchret from %2 to label %catchret.dest
; CHECK: catch: ; preds = %catch.start
; CHECK-NEXT: %exn = load i8*, i8** %exn.slot15, align 4
-; CHECK-NEXT: %5 = call i8* @__cxa_begin_catch(i8* %exn) #2 [ "funclet"(token %2) ]
+; CHECK-NEXT: %5 = call i8* @__cxa_begin_catch(i8* %exn) #7 [ "funclet"(token %2) ]
; CHECK-NEXT: invoke void @__cxa_end_catch() [ "funclet"(token %2) ]
; CHECK-NEXT: to label %.noexc unwind label %catch.dispatch.longjmp
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