[PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form

[Yashwant Singh via Phabricator via llvm-commits]

yassingh updated this revision to Diff 474481.
yassingh added a comment.

Since only v_add_co_u32_e32 can be converted to SDWA form there is no need to try convert v_addc_co_u32_e64 to it's VOP2 form. This will allow us to get rid of all the checks we were performing on v_addc_co_u32. The shrinking of this instr will be taken care by si-shrink-instructions.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136663/new/

https://reviews.llvm.org/D136663

Files:
  llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
  llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
  llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
  llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll

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