[PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

In D137591#3919786 <https://reviews.llvm.org/D137591#3919786>, @craig.topper wrote:

> In D137591#3919658 <https://reviews.llvm.org/D137591#3919658>, @reames wrote:
>
>> Fix bug around missing divide by 8.
>>
>> I have to admit I don't know why that divide is needed.  It parallels the code in getVLENFactoredAmount, but it's not clear to me where the factor of 8 comes from.
>
> I think all scalable vector stack objects are rounded up to be a multiple of 8 by this code in `RISCVFrameLowering::assignRVVStackObjectOffsets`
>
>   // If the data type is the fractional vector type, reserve one vector        
>   // register for it.                                                          
>   if (ObjectSize < 8)                                                          
>     ObjectSize = 8;
>
> I think this is done because there is no fractional whole register load/store. The divide by 8 is trying to figure out how many whole registers there are.

The bit I don't understand is the interpretation of object size for a scalable value.  Why is "8" the right number for a single VLEN sized register?


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