[PATCH] D137699: [RISCV] Don't use zero-stride vector load if there's no optimized u-arch

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 10 22:28:58 PST 2022


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCV.td:455
 
+def FeatureNoOptimizedZeroStrideLoad
+   : SubtargetFeature<"no-optimized-zero-stride-load", "HasOptimizedZeroStrideLoad",
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`FeatureNoOptimizedZeroStrideLoad` -> `TuneNoOptimizedZeroStrideLoad`.


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  https://reviews.llvm.org/D137699/new/

https://reviews.llvm.org/D137699



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