[PATCH] D135847: [PowerPC] don't check CTR clobber in hardware loop insertion pass

[Kai Luo via Phabricator via llvm-commits]

lkail added inline comments.


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Comment at: llvm/test/CodeGen/PowerPC/pr36292.ll:22
+; CHECK-NEXT:    .p2align 4
+; CHECK-NEXT:  .LBB0_1: # %forcond
+; CHECK-NEXT:    #
----------------
Do you have any idea of this regression? Looks we have additional `addi` and `b` in the loop after the change.


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Comment at: llvm/test/CodeGen/PowerPC/pr48519.ll:31
 ; CHECK-NEXT:    cmpldi r30, 0
-; CHECK-NEXT:    bne+ cr0, .LBB0_1
+; CHECK-NEXT:    bc 12, gt, .LBB0_1
 ; CHECK-NEXT:  # %bb.2: # %bb11
----------------
nit: Maybe we should change `undef` to concrete value to avoid flag flip.


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Comment at: llvm/test/CodeGen/PowerPC/pr55463.ll:71
 ; CHECK-NEXT:    evmergelo 3, 3, 4
-; CHECK-NEXT:    addi 28, 28, 1
+; CHECK-NEXT:    addi 28, 28, -1
 ; CHECK-NEXT:    cmplwi 28, 0
----------------
nit: `undef` leads to flag flip.


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Comment at: llvm/test/CodeGen/PowerPC/spe.ll:1798
 ; CHECK-NEXT:    mr 5, 3
-; CHECK-NEXT:    bne 0, .LBB56_2
+; CHECK-NEXT:    cmplwi 30, 0
+; CHECK-NEXT:    addi 29, 29, 1
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This regression looks the same pattern as `llvm/test/CodeGen/PowerPC/pr36292.ll`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135847/new/

https://reviews.llvm.org/D135847