[PATCH] D137705: [AMDGPU] Add DAG Combine for right-shift carry add to uaddo

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:3222
+      SDValue UADDO = DAG.getNode(ISD::UADDO, SL, {MVT::i32, MVT::i1}, {A, B});
+      // Replace the original add with (i64 (zext (uaddo ...)))
+      DAG.ReplaceAllUsesOfValueWith(
----------------
This is not correct because it will lose the overflow bit. You should probably only do this if the ADD has a single use.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137705/new/

https://reviews.llvm.org/D137705