[PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known

[Philip Reames via Phabricator via llvm-commits]

reames added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll:6
 ; RUN:    | FileCheck --check-prefix=SPILL-O2 %s
+; RUN: llc -mtriple=riscv64 -mattr=+v,+d -mattr=+d -riscv-v-vector-bits-min=256 -riscv-v-vector-bits-max=256 -O2 < %s \
+; RUN:    | FileCheck --check-prefix=SPILL-O2-VLEN128 %s
----------------
kito-cheng wrote:
> And this also an old problem here, should we emit a warring or error when zvl*b info is mismatch with `-riscv-v-vector-bits-min=`? min vlen is 128 according the `zvl128b` (which implied by `v`), but we force that become 256 by `-riscv-v-vector-bits-min=`, that became an issue when we use `Tag_RISCV_arch`* to check the expected minimal vlen requirement for the object?
> 
> * There is still controversial about how to interpret `Tag_RISCV_arch`, but eventually will resolved that by some way.
There's no conflict here.  Zvl128b is a minimum, not a maximum.  As such, specifying a larger VLEN via -riscv-v-vector-bits-min does not conflict.

There's a separate question of whether the -riscv-v-vector-bits-min should effect the attributes, but that's well out of scope for this patch.  


================
Comment at: llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll:7
+; RUN: llc -mtriple=riscv64 -mattr=+v,+d -mattr=+d -riscv-v-vector-bits-min=256 -riscv-v-vector-bits-max=256 -O2 < %s \
+; RUN:    | FileCheck --check-prefix=SPILL-O2-VLEN128 %s
+
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kito-cheng wrote:
> Should be SPILL-O2-VLEN256?
This is a typo, and I'll fix.  


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137591/new/

https://reviews.llvm.org/D137591