[PATCH] D63401: SROA: Simplify addrspacecasted allocas with volatile accesses

[Matt Arsenault via Phabricator via llvm-commits]

arsenm marked 2 inline comments as done.
arsenm added a comment.

In D63401#3901422 <https://reviews.llvm.org/D63401#3901422>, @nikic wrote:

> Looks reasonable. I assume the case where this would be actually useful if an alloca gets split into parts that have volatile and non-volatile accesses, and the non-volatile accesses then get promoted?

Yes, but I was mostly noticing the missing cleanup up of the aggregate types



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Comment at: llvm/lib/Transforms/Scalar/SROA.cpp:3033
     MaybeAlign SrcAlign = OtherAlign;
-    Value *DstPtr = &NewAI;
     MaybeAlign DstAlign = SliceAlign;
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nikic wrote:
> Can't we use getPtrToNewAI here and keep the rest of the code structure?
I'm not sure what you're asking here, the new code does use it below 


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Comment at: llvm/test/Transforms/SROA/addrspacecast.ll:177
+; CHECK:       L2:
+; CHECK-NEXT:    [[A_SROA_0_0_A_SROA_0_20_Z:%.*]] = load i65, ptr [[A_SROA_0]], align 4
+; CHECK-NEXT:    ret i65 [[A_SROA_0_0_A_SROA_0_20_Z]]
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nikic wrote:
> Why does this load not get promoted (to undef)?
I don't know, but I see the same thing without the patch and without address spaces or volatiles involved


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