[PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.

[Han-Kuan Chen via Phabricator via llvm-commits]

HanKuanChen added a comment.

In D137704#3924007 <https://reviews.llvm.org/D137704#3924007>, @craig.topper wrote:

> This test crashes
>
>   define void @vnsrl_2_undef_float(ptr %in, ptr %out) {
>   entry:
>     %0 = load <32 x float>, ptr %in, align 4
>     %1 = shufflevector <32 x float> %0, <32 x float> poison, <16 x i32> <i32 1, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
>     store <16 x float> %1, ptr %out, align 4
>     ret void
>   }

I will merge and close https://reviews.llvm.org/D137904 to solve this test.


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  https://reviews.llvm.org/D137704/new/

https://reviews.llvm.org/D137704