[PATCH] D137913: [X86] Rewrite `getScalarizationOverhead()`

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 13 12:58:48 PST 2022 

lebedev.ri updated this revision to Diff 475016.
lebedev.ri marked an inline comment as done.
lebedev.ri added a comment.

Thanks for taking a look!

A bit more refactoring...


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137913/new/

https://reviews.llvm.org/D137913

Files:
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/X86/arith-fp-codesize.ll
  llvm/test/Analysis/CostModel/X86/arith-fp-latency.ll
  llvm/test/Analysis/CostModel/X86/arith-fp-sizelatency.ll
  llvm/test/Analysis/CostModel/X86/arith-fp.ll
  llvm/test/Analysis/CostModel/X86/bitreverse-codesize.ll
  llvm/test/Analysis/CostModel/X86/bitreverse-latency.ll
  llvm/test/Analysis/CostModel/X86/bitreverse-sizelatency.ll
  llvm/test/Analysis/CostModel/X86/fmaxnum-size-latency.ll
  llvm/test/Analysis/CostModel/X86/fminnum-size-latency.ll
  llvm/test/Analysis/CostModel/X86/fptoi_sat.ll
  llvm/test/Analysis/CostModel/X86/fptosi.ll
  llvm/test/Analysis/CostModel/X86/fptoui.ll
  llvm/test/Analysis/CostModel/X86/gather-i16-with-i8-index.ll
  llvm/test/Analysis/CostModel/X86/gather-i32-with-i8-index.ll
  llvm/test/Analysis/CostModel/X86/gather-i64-with-i8-index.ll
  llvm/test/Analysis/CostModel/X86/gather-i8-with-i8-index.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-5.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-7.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-8.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-5.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-6.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-7.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-8.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2-indices-0u.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-01u.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-0uu.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-012u.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-01uu.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-0uuu.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-5.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-7.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-8.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-5.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-6.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-7.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-8.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-4.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-5.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-7.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-8.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-5.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-6.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-7.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-8.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-4.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-5.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-6.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-7.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-8.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-5.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-6.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-7.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-8.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-5.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-6.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-7.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-8.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-3.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-4.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-5.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-6.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-7.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-8.ll
  llvm/test/Analysis/CostModel/X86/masked-gather-i64-with-i8-index.ll
  llvm/test/Analysis/CostModel/X86/masked-interleaved-load-i16.ll
  llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll
  llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
  llvm/test/Analysis/CostModel/X86/powi.ll
  llvm/test/Analysis/CostModel/X86/shuffle-replication-i1.ll
  llvm/test/Analysis/CostModel/X86/shuffle-replication-i16.ll
  llvm/test/Analysis/CostModel/X86/shuffle-replication-i32.ll
  llvm/test/Analysis/CostModel/X86/shuffle-replication-i64.ll
  llvm/test/Analysis/CostModel/X86/shuffle-replication-i8.ll
  llvm/test/Analysis/CostModel/X86/sitofp.ll
  llvm/test/Analysis/CostModel/X86/trunc.ll
  llvm/test/Transforms/LoopVectorize/X86/vector_ptr_load_store.ll
  llvm/test/Transforms/SLPVectorizer/X86/vectorize-reorder-reuse.ll

More information about the llvm-commits mailing list