[llvm] 4e0d2f8 - [X86] Fix sched class typo - the CVTPD2DQrr instructions were mapping to ZnWriteCVTDQ2PDr instead of ZnWriteCVTPD2DQr

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-11-13T09:34:27Z
New Revision: 4e0d2f8e6f140573fbe527b65be99f3347b94155

URL: https://github.com/llvm/llvm-project/commit/4e0d2f8e6f140573fbe527b65be99f3347b94155
DIFF: https://github.com/llvm/llvm-project/commit/4e0d2f8e6f140573fbe527b65be99f3347b94155.diff

LOG: [X86] Fix sched class typo - the CVTPD2DQrr instructions were mapping to ZnWriteCVTDQ2PDr instead of ZnWriteCVTPD2DQr

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ScheduleZnver1.td

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td
index 705100d85f36..1185d5f5ca07 100644
--- a/llvm/lib/Target/X86/X86ScheduleZnver1.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td
@@ -1233,7 +1233,7 @@ def ZnWriteCVTPD2DQr: SchedWriteRes<[ZnFPU12, ZnFPU3]> {
 }
 // CVT(T)PD2DQ.
 // x,x.
-def : InstRW<[ZnWriteCVTDQ2PDr], (instregex "(V?)CVT(T?)PD2DQrr")>;
+def : InstRW<[ZnWriteCVTPD2DQr], (instregex "(V?)CVT(T?)PD2DQrr")>;
 
 def ZnWriteCVTPD2DQLd: SchedWriteRes<[ZnAGU,ZnFPU12,ZnFPU3]> {
   let Latency = 12;