[PATCH] D137433: [DAG] Add canonicalization to avoid redundant nots in concat vectors

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

This seems overly specialized - do we really care that the pattern ends in 'not' rather than any 'xor' rather than any bitwise-logic rather than any binop?

Note that we do have more general folds that could affect patterns like this:
https://github.com/llvm/llvm-project/blob/3dbda5ff88518912bbb72f03d95805634507ac17/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L13774

It's been a few years since that was added (D55126 <https://reviews.llvm.org/D55126>), so I wonder if we still show harm on regression tests by easing the legality and type constraints?

Either way, this patch could add more direct tests of the transforms.

  define <8 x i16> @not_not_trunc_concat(<4 x i32> %x, <4 x i32> %y) {
    %notx = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
    %noty = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
    %trnx = trunc <4 x i32> %notx to <4 x i16>
    %trny = trunc <4 x i32> %noty to <4 x i16>
    %r = shufflevector <4 x i16> %trnx, <4 x i16> %trny, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
    ret <8 x i16> %r
  }

I suspect that's going to be worse on some x86 subtargets. But that's not canonical IR (we would at least narrow the 'nots')...so we might not gate this patch on what may be target-specific improvements to x86 shuffling.


Repository:
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  https://reviews.llvm.org/D137433/new/

https://reviews.llvm.org/D137433