[PATCH] D137689: [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the left or right shift of another operand
Mingming Liu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 10 12:59:21 PST 2022
mingmingl added inline comments.
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Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:2945
+ SDValue Ops[] = {OrOpd1, OrOpd1,
+ CurDAG->getTargetConstant(ShlImm, DL, VT)};
+ CurDAG->SelectNodeTo(N, OrrOpc, VT, Ops);
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dmgreen wrote:
> Should this go through getShifterImm, for consistency even if LSL == 0?
Done in https://reviews.llvm.org/D137797.
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Comment at: llvm/test/CodeGen/AArch64/bitfield-insert.ll:641
; For or operation, one operand is a left shift of another operand.
; Use orr with left-shifted operand is better than bfi.
define i64 @test_orr_not_bfi_i64(i64 %0) {
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khchen wrote:
> seem we could update the comments as well.
I realize it could be confusing to say "orr is better than a instruction that wouldn't be generated going forward", so rephrased to 'orr is generated, not bfi/bfxil'. Let me know if I miss what should be updated, thanks!
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D137689/new/
https://reviews.llvm.org/D137689
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