[PATCH] D137465: [AArch64]Combine BFXIL to ORR with right shift for ISD::OR instruction selection
Mingming Liu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 8 11:21:02 PST 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGe4e7bdebb180: [AArch64]Combine BFXIL to ORR with right shift for ISD::OR instruction selection (authored by mingmingl).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D137465/new/
https://reviews.llvm.org/D137465
Files:
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/test/CodeGen/AArch64/fcopysign.ll
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