[PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 10 09:32:17 PST 2022
craig.topper added a comment.
In D137591#3919658 <https://reviews.llvm.org/D137591#3919658>, @reames wrote:
> Fix bug around missing divide by 8.
>
> I have to admit I don't know why that divide is needed. It parallels the code in getVLENFactoredAmount, but it's not clear to me where the factor of 8 comes from.
I think all scalable vector stack objects are rounded up to be a multiple of 8 by this code in `RISCVFrameLowering::assignRVVStackObjectOffsets`
// If the data type is the fractional vector type, reserve one vector
// register for it.
if (ObjectSize < 8)
ObjectSize = 8;
I think this is done because there is no fractional whole register load/store. The divide by 8 is trying to figure out how many whole registers there are.
================
Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:185
+ assert(ScalableValue % 8 == 0 &&
+ "Reserve the stack by the multiple of one vector size.");
+ int64_t NumOfVReg = ScalableValue / 8;
----------------
I'm sure you copy and pasted this from somewhere else, but this message isn't great. It should be something like "Scalable offset is not a multiple of a single vector size."
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https://reviews.llvm.org/D137591/new/
https://reviews.llvm.org/D137591
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