[PATCH] D6970: R600/SI: Try to form (f64 [s|u]int_to_fp i1)

[Matt Arsenault via Phabricator via llvm-commits]

arsenm updated this revision to Diff 474949.
arsenm retitled this revision from "R600/SI: Try to form (f64 [s|u]int_to_fp i1)
" to "R600/SI: Try to form (f64 [s|u]int_to_fp i1)".
arsenm edited the summary of this revision.
arsenm added a reviewer: AMDGPU.
arsenm added a comment.
Herald added subscribers: kosarev, foad, ecnelises, kerbowa, hiraditya, wdng, jvesely.
Herald added projects: LLVM, All.

Rebase 7 years into the future.

This optimization doesn't make sense if v_cvt_f64_i32 is quarter rate, which it is on some subtargets at least. I'm not sure the scheduler model is 100% accurate
for every subtarget, and it seems to always say it's quarter rate


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D6970/new/

https://reviews.llvm.org/D6970

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
  llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll

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