[PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.

[Han-Kuan Chen via Phabricator via llvm-commits]

HanKuanChen added a comment.

In D137704#3924089 <https://reviews.llvm.org/D137704#3924089>, @craig.topper wrote:

> Am I correct in thinking that all of the tests are using LMUL=1 or fractional LMUL?

Yes.


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  https://reviews.llvm.org/D137704/new/

https://reviews.llvm.org/D137704