[PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 13 23:02:30 PST 2022


craig.topper added a comment.

Am I correct in thinking that all of the tests are using LMUL=1 or fractional LMUL?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137704/new/

https://reviews.llvm.org/D137704



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