[PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly
Caroline via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 10 06:03:11 PST 2022
CarolineConcatto added inline comments.
================
Comment at: llvm/lib/Target/AArch64/SMEInstrFormats.td:3428
string mnemonic>
- : I<(outs vector_ty:$Zd),
+ : I<!if(op{3}, (outs vector_ty:$Zd, tile_ty:$_ZAn), (outs vector_ty:$Zd)),
(ins tile_ty:$ZAn, MatrixIndexGPR32Op12_15:$Rs, index_ty:$imm),
----------------
david-arm wrote:
> I couldn't seem to find any case where `op{3}` is known to be 0b1 unless I've misunderstood something?
It should be 4, for movaz the output should have tile_ty:$_ZAn too.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D137571/new/
https://reviews.llvm.org/D137571
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