[PATCH] D137425: [M68k] Add predicates `AtLeastM680x0`

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This revision was automatically updated to reflect the committed changes.
Closed by commit rGc7d6a0f6bfff: [M68k] Replace `IsM680x0` with predicates `AtLeastM680x0` (authored by 0x59616e).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137425/new/

https://reviews.llvm.org/D137425

Files:
  llvm/lib/Target/M68k/M68kInstrData.td
  llvm/lib/Target/M68k/M68kInstrInfo.td


Index: llvm/lib/Target/M68k/M68kInstrInfo.td
===================================================================
--- llvm/lib/Target/M68k/M68kInstrInfo.td
+++ llvm/lib/Target/M68k/M68kInstrInfo.td
@@ -429,12 +429,12 @@
                              "TM.getCodeModel() == CodeModel::Kernel">;
 def IsPIC        : Predicate<"TM.isPositionIndependent()">;
 def IsNotPIC     : Predicate<"!TM.isPositionIndependent()">;
-def IsM68000     : Predicate<"Subtarget.IsM68000()">;
-def IsM68010     : Predicate<"Subtarget.IsM68010()">;
-def IsM68020     : Predicate<"Subtarget.IsM68020()">;
-def IsM68030     : Predicate<"Subtarget.IsM68030()">;
-def IsM68040     : Predicate<"Subtarget.IsM68040()">;
 
+def AtLeastM68000     : Predicate<"Subtarget->atLeastM68000()">;
+def AtLeastM68010     : Predicate<"Subtarget->atLeastM68010()">;
+def AtLeastM68020     : Predicate<"Subtarget->atLeastM68020()">;
+def AtLeastM68030     : Predicate<"Subtarget->atLeastM68030()">;
+def AtLeastM68040     : Predicate<"Subtarget->atLeastM68040()">;
 
 //===----------------------------------------------------------------------===//
 // Condition Codes
Index: llvm/lib/Target/M68k/M68kInstrData.td
===================================================================
--- llvm/lib/Target/M68k/M68kInstrData.td
+++ llvm/lib/Target/M68k/M68kInstrData.td
@@ -385,13 +385,13 @@
 let Uses = [CCR] in {
 class MxMoveFromCCR_R
     : MxInst<(outs MxDRD16:$dst), (ins CCRC:$src), "move.w\t$src, $dst", []>,
-      Requires<[ IsM68010 ]> {
+      Requires<[ AtLeastM68010 ]> {
   let Inst = (descend 0b0100001011, MxEncAddrMode_d<"dst">.EA);
 }
 
 class MxMoveFromCCR_M<MxOperand MEMOp, MxEncMemOp DST_ENC>
     : MxInst<(outs), (ins MEMOp:$dst, CCRC:$src), "move.w\t$src, $dst", []>,
-      Requires<[ IsM68010 ]> {
+      Requires<[ AtLeastM68010 ]> {
   let Inst = (ascend
     (descend 0b0100001011, DST_ENC.EA),
     DST_ENC.Supplement


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