The Week Of Monday 3 July 2023 Archives by date
Starting: Mon Jul 3 00:02:17 PDT 2023
Ending: Sun Jul 9 23:49:56 PDT 2023
Messages: 2268
- [PATCH] D153453: (WIP)[MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas
Kohei Asano via Phabricator via llvm-commits
- [llvm] 86829d1 - [CSKY] Optimize IR pattern icmp-select with DECT32/DECF32
Ben Shi via llvm-commits
- [llvm] d53063c - [CSKY] Optimize conditional branch with BLZ32/BLSZ32/BHZ32/BHSZ32
Ben Shi via llvm-commits
- [PATCH] D153518: [CSKY] Optimize IR pattern icmp-select with DECT32/DECF32
Ben Shi via Phabricator via llvm-commits
- [PATCH] D153607: [CSKY] Optimize conditional branch with BHZ32/BHSZ32/BLSZ32/BLZ32
Ben Shi via Phabricator via llvm-commits
- [PATCH] D153607: [CSKY] Optimize conditional branch with BHZ32/BHSZ32/BLSZ32/BLZ32
Ben Shi via Phabricator via llvm-commits
- [PATCH] D153376: Introducing llvm-cm: A Cost Model Tool
James Henderson via Phabricator via llvm-commits
- [PATCH] D149093: [llvm-objdump] [NFC] Factor out DisassemblerTarget class.
James Henderson via Phabricator via llvm-commits
- [PATCH] D153607: [CSKY] Optimize conditional branch with BHZ32/BHSZ32/BLSZ32/BLZ32
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D149091: [Object] Recognize ARM64EC binaries in COFFObjectFile::getMachine.
James Henderson via Phabricator via llvm-commits
- [PATCH] D154048: [PowerPC] fix jumptable encoding when ppc-use-absolute-jumptables is turned on
Ting Wang via Phabricator via llvm-commits
- [PATCH] D149440: [yaml2obj] Add support for load config section data.
James Henderson via Phabricator via llvm-commits
- [PATCH] D149440: [yaml2obj] Add support for load config section data.
James Henderson via Phabricator via llvm-commits
- [llvm] ddbc762 - [ADT] Add deduction guide for iterator_range
Balazs Benics via llvm-commits
- [PATCH] D152891: [ADT] Add deduction guide for iterator_range
Balázs Benics via Phabricator via llvm-commits
- [PATCH] D149439: [yaml2obj] Add support fot structured section data.
James Henderson via Phabricator via llvm-commits
- [PATCH] D154197: [LoongArch][MC] Add testcases for LSX instructions
陈荔 via Phabricator via llvm-commits
- [PATCH] D151284: [RISCV] Custom lower FP_TO_FP16 and FP16_TO_FP to correct ABI of of libcall
Zixuan Wu via Phabricator via llvm-commits
- [PATCH] D154192: [LoongArch] Explicitly specify instruction properties
Lu Weining via Phabricator via llvm-commits
- [PATCH] D152536: [DWARF] Allow op-index in line number programs
David Stenberg via Phabricator via llvm-commits
- [PATCH] D154187: [InstCombine] Add test cases from PR63321. NFC.
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D154157: [LV] Cost model for out-of-loop reductions
Dave Green via Phabricator via llvm-commits
- [PATCH] D154326: [LoongArch][MC] Add testcases for LASX instructions
陈荔 via Phabricator via llvm-commits
- [PATCH] D154232: [AArch64] NFC : Change the way pseudos are appended
Dave Green via Phabricator via llvm-commits
- [PATCH] D154084: [AArch64] Modify SVE Pseudo appends
Dave Green via Phabricator via llvm-commits
- [llvm] 280d163 - [dfsan] Support Linux loongarch64
via llvm-commits
- [PATCH] D140690: [dfsan] Support Linux loongarch64
Limin Zhang via Phabricator via llvm-commits
- [PATCH] D154314: [LV] Prefer the tail fold according the the user hint
David Sherwood via Phabricator via llvm-commits
- [PATCH] D135849: [llvm] Return canonical virtual path from `RedirectingFileSystem`
Jan Svoboda via Phabricator via llvm-commits
- [llvm] f64e113 - [X86]Precommit test cases for D154193
via llvm-commits
- [PATCH] D154322: [X86]Precommit test cases for D154193
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D154225: [X86] Enable the VR512 register class when AVX512 is enabled
Nabeel Omer via Phabricator via llvm-commits
- [PATCH] D153421: [mlir][Linalg] Implement the tiling interface for softmax
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D154323: [MemoryDependencyAnalysis] Delete cache infos if CacheInfo->size != Loc.size
luxufan via Phabricator via llvm-commits
- [PATCH] D154048: [PowerPC] fix jumptable encoding when ppc-use-absolute-jumptables is turned on
ChenZheng via Phabricator via llvm-commits
- [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D151021: [llvm-exegesis] Introduce Subprocess Executor Mode
Zixuan Wu via Phabricator via llvm-commits
- [PATCH] D152891: [ADT] Add deduction guide for iterator_range
Balázs Benics via Phabricator via llvm-commits
- [PATCH] D152996: [RISCV][POC] Model frm control for vfadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [llvm] db32d11 - [Reassociate] Keep flags for more unchanged operations
David Green via llvm-commits
- [PATCH] D154289: [Reassociate] Keep flags for more unchanged operations
Dave Green via Phabricator via llvm-commits
- [PATCH] D154193: [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D154215: [InstSimplify] Fold gep inbounds undef to undef instead of poison
Nuno Lopes via Phabricator via llvm-commits
- [PATCH] D154055: [InstCombine] Preserve inbounds when folding select of GEP
Nuno Lopes via Phabricator via llvm-commits
- [PATCH] D153721: [RISCV] Add support for XCVsimd extension in CV32E40P
Funan Zeng via Phabricator via llvm-commits
- [PATCH] D152891: [ADT] Add deduction guide for iterator_range
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153948: [RISCV][NFC] Refactor lowerToScalableOp.
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D152891: [ADT] Add deduction guide for iterator_range
Balázs Benics via Phabricator via llvm-commits
- [PATCH] D152714: [AArch64][Optimization]Solving the FCCMP issue
Priyanshi Agarwal via Phabricator via llvm-commits
- [PATCH] D154330: [CSKY] Optimize constant materialization with BMASKI32
Ben Shi via Phabricator via llvm-commits
- [llvm] fc5a579 - [IRCE][Tests] Add tests with range checks in the form of 'iv + offset vs limit'
via llvm-commits
- [PATCH] D154062: [IRCE][Tests] Add tests with range checks in the form of 'iv + offset vs limit'
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D154084: [AArch64] Modify SVE Pseudo appends
Paul Walker via Phabricator via llvm-commits
- [PATCH] D153740: [llvm][Support] Deprecate llvm::writeFileAtomically API
Haojian Wu via Phabricator via llvm-commits
- [PATCH] D154084: [AArch64] Modify SVE Pseudo appends
Dave Green via Phabricator via llvm-commits
- [PATCH] D153740: [llvm][Support] Deprecate llvm::writeFileAtomically API
Haojian Wu via Phabricator via llvm-commits
- [PATCH] D152996: [RISCV][POC] Model frm control for vfadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154084: [AArch64] Modify SVE Pseudo appends
Paul Walker via Phabricator via llvm-commits
- [PATCH] D152996: [RISCV][POC] Model frm control for vfadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D152535: [DWARF] Add printout for op-index
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D152891: [ADT] Add deduction guide for iterator_range
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D154331: [AMDGPU][AsmParser][NFC] Remove an unused function.
Ivan Kosarev via Phabricator via llvm-commits
- [llvm] 5ca78d6 - [AMDGPU] Fix typo for "amdgpu-spill-sgpr-to-vgpr" option description
Xiaodong Liu via llvm-commits
- [llvm] 39b5a02 - [ISel] Improve notes for 'ComplexPattern' class
Xiaodong Liu via llvm-commits
- [PATCH] D154331: [AMDGPU][AsmParser][NFC] Remove an unused function.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D154276: [RISCV] Use parseDirective returning ternary status (NFC)
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D151284: [RISCV] Custom lower FP_TO_FP16 and FP16_TO_FP to correct ABI of of libcall
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D153421: [mlir][Linalg] Implement the tiling interface for softmax
Adrian Kuegel via Phabricator via llvm-commits
- [PATCH] D154291: [RISCV] Replace OperandMatchResultTy with ParseStatus (NFC)
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D154332: [CSKY][test][NFC] Add tests of multiplication with immediates
Ben Shi via Phabricator via llvm-commits
- [llvm] 22f2173 - [AArch64] Add PredictableSelectIsExpensive feature to all the cpus that have FeatureEnableSelectOptimize
Aleksandr Popov via llvm-commits
- [PATCH] D143162: [AArch64] Add PredictableSelectIsExpensive feature to all the cpus that have FeatureEnableSelectOptimize
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D154258: [RISCV] Refactor vfcvt_rm pseudo insertion case statements. NFC
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D154333: [CSKY] Optimize multiplication with immediates
Ben Shi via Phabricator via llvm-commits
- [PATCH] D154333: [CSKY] Optimize multiplication with immediates
Ben Shi via Phabricator via llvm-commits
- [llvm] b4f9c3a - [CodeGen] Refactor ComplexDeinterleaving to run identification on Values instead of Instructions
Igor Kirillov via llvm-commits
- [PATCH] D153446: [CodeGen] Refactor ComplexDeinterleaving to run identification on Values instead of Instructions
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D154212: [cmake] Add LLVM_UNITTEST_LINK_FLAGS option
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153421: [mlir][Linalg] Implement the tiling interface for softmax
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D153421: [mlir][Linalg] Implement the tiling interface for softmax
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D139092: [LLD][ELF] Cortex-M Security Extensions (CMSE) Support
Amilendra Kodithuwakku via Phabricator via llvm-commits
- [PATCH] D139092: [LLD][ELF] Cortex-M Security Extensions (CMSE) Support
Amilendra Kodithuwakku via Phabricator via llvm-commits
- [PATCH] D153751: [CSKY] Optimize ANDI/ORI to BSETI/BCLRI for specific immediates
Ben Shi via Phabricator via llvm-commits
- [PATCH] D154232: [AArch64] NFC : Change the way SVE pseudos are appended
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D150133: [RISCV] Support constant operand for la and lla pseudoinstruction.
garvit gupta via Phabricator via llvm-commits
- [llvm] 32e5d61 - [RISCV] Use parseDirective returning ternary status (NFC)
Sergei Barannikov via llvm-commits
- [PATCH] D154276: [RISCV] Use parseDirective returning ternary status (NFC)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D152536: [DWARF] Allow op-index in line number programs
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D154232: [AArch64] NFC : Change the way SVE pseudos are appended
Paul Walker via Phabricator via llvm-commits
- [PATCH] D154337: [AMDGPU] Eliminate SIMCCodeEmitter and de-virtualise encoding methods.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D154228: [GVN] Use vector ops when doing loadCoercion on a vector value
Manuel Brito via Phabricator via llvm-commits
- [PATCH] D151039: [Docs][llvm-exegesis] Add documentation for memory
Ondrej Sykora via Phabricator via llvm-commits
- [PATCH] D154337: [AMDGPU] Eliminate SIMCCodeEmitter and de-virtualise encoding methods.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151204: [VPlan] Allow sinking of instructions with no defs
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154337: [AMDGPU] Eliminate SIMCCodeEmitter and de-virtualise encoding methods.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D154157: [LV] Cost model for out-of-loop reductions
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154157: [LV] Cost model for out-of-loop reductions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154307: [InstructionSimplify] Avoid simplifying ICmp without parent
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154232: [AArch64] NFC : Change the way SVE pseudos are appended
Ricardo Jesus via Phabricator via llvm-commits
- [PATCH] D154338: Fix race condition in order-of-destruction between SectionMemoryManager and its MemoryMapper
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D153771: [BOLT][Instrumentation] Fix hash table memory corruption and append-pid option
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D153963: [InstCombine] Fold add of select and cast of select condition
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D153963: [InstCombine] Fold add of select and cast of select condition
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getCPUDispatchMangling
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D153717: [SCCP] Replace valuestate.isConstant with helper isConstant
luxufan via Phabricator via llvm-commits
- [PATCH] D154341: use StringMap in llvm-dwp when merging debug_str.dwo section
zhuna via Phabricator via llvm-commits
- [llvm] c14b0a7 - [LV] Check for vector instruction in main vector loop.
Florian Hahn via llvm-commits
- [PATCH] D154342: [InstCombine] Test cases for D154206
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D153717: [SCCP] Replace valuestate.isConstant with helper isConstant
luxufan via Phabricator via llvm-commits
- [PATCH] D152162: DWP multithreading
zhuna via Phabricator via llvm-commits
- [PATCH] D154206: [InstCombine] Fold comparison of usub.sat
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D154233: [ARM] generate correct code for armv6-m XO big stack operations
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D153262: [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE
Thomas Köppe via Phabricator via llvm-commits
- [PATCH] D154206: [InstCombine] Fold comparison of usub.sat
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D154232: [AArch64] NFC : Change the way SVE pseudos are appended
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D154232: [AArch64] NFC : Change the way SVE pseudos are appended
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D154206: [InstCombine] Fold comparison of usub.sat
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154233: [ARM] generate correct code for armv6-m XO big stack operations
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D153534: [lit] Remove dead code not referenced, documented or tested anywhere
Louis Dionne via Phabricator via llvm-commits
- [llvm] 29f4c39 - [lit] Remove dead code not referenced, documented or tested anywhere
Louis Dionne via llvm-commits
- [PATCH] D153534: [lit] Remove dead code not referenced, documented or tested anywhere
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D153967: [lit] Remove the --no-indirectly-run-check option
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D154346: [PEI] Simplify iterator handling in replaceFrameIndicesBackward. NFCI.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D154347: [PEI][Mips] Switch to backwards frame index elimination
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153262: [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE
Thomas Köppe via Phabricator via llvm-commits
- [PATCH] D153262: [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE
Thomas Köppe via Phabricator via llvm-commits
- [llvm] ab3bb86 - Revert "[ARM] Adjust strd/ldrd codegen alignment requirements"
David Spickett via llvm-commits
- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
Manish Kausik H via Phabricator via llvm-commits
- [PATCH] D153800: [ARM] Adjust strd/ldrd codegen alignment requirements
David Spickett via Phabricator via llvm-commits
- [llvm] 23ed601 - [NFC] Fix typo explicitly_convertable -> explicitly_convertible
Balazs Benics via llvm-commits
- [PATCH] D152891: [ADT] Add deduction guide for iterator_range
Balázs Benics via Phabricator via llvm-commits
- [PATCH] D153800: [ARM] Adjust strd/ldrd codegen alignment requirements
Maurice Heumann via Phabricator via llvm-commits
- [PATCH] D153537: [AMDGPU] Do not wait for vscnt on function entry and return
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153771: [BOLT][Instrumentation] Fix hash table memory corruption and append-pid option
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D153800: [ARM] Adjust strd/ldrd codegen alignment requirements
David Spickett via Phabricator via llvm-commits
- [PATCH] D154232: [AArch64] NFC : Change the way SVE pseudos are appended
harvin iriawan via Phabricator via llvm-commits
- [llvm] c9eec3b - [SVE] Extend incp/decp testing to cover 32-bit use cases.
Paul Walker via llvm-commits
- [PATCH] D154084: [AArch64] Modify SVE Pseudo appends
harvin iriawan via Phabricator via llvm-commits
- [PATCH] D143052: [CMake] Replace llvm_check_linker_flag and llvm_check_compiler_linker_flag
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D153530: [Sparc] Remove unused TableGen classes and multiclasses.
Koakuma via Phabricator via llvm-commits
- [PATCH] D154350: [SVE] Add isel for 32-bit add/sub(cntp()) -> incp/decp.
Paul Walker via Phabricator via llvm-commits
- [PATCH] D154351: [llvm][TableGen][Jupyter] Record current python when kernel is installed
David Spickett via Phabricator via llvm-commits
- [PATCH] D154352: [mlir-cpu-runner] Check entry function is void
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D153537: [AMDGPU] Do not wait for vscnt on function entry and return
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154351: [llvm][TableGen][Jupyter] Record current python when kernel is installed
David Spickett via Phabricator via llvm-commits
- [PATCH] D153537: [AMDGPU] Do not wait for vscnt on function entry and return
Jay Foad via Phabricator via llvm-commits
- [PATCH] D154353: [DebugInfo][RemoveDIs] Implement behind-the-scenes debug-info maintenance in splice / moveBefore / insertBefore APIs
Jeremy Morse via Phabricator via llvm-commits
- [PATCH] D154355: [ARM] make execute only long call test checks more robust
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D153537: [AMDGPU] Do not wait for vscnt on function entry and return
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153537: [AMDGPU] Do not wait for vscnt on function entry and return
Jay Foad via Phabricator via llvm-commits
- [PATCH] D154355: [ARM] make execute only long call test checks more robust
Dave Green via Phabricator via llvm-commits
- [llvm] 0f58cfe - [Mips] Remove isMoveReg=1 from wrdsp and rddsp instructions
Yashwant Singh via llvm-commits
- [PATCH] D151181: [Mips] Remove isMoveReg=1 from wrdsp and rddsp instructions
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D154233: [ARM] generate correct code for armv6-m XO big stack operations
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D152536: [DWARF] Allow op-index in line number programs
David Stenberg via Phabricator via llvm-commits
- [PATCH] D152536: [DWARF] Allow op-index in line number programs
David Stenberg via Phabricator via llvm-commits
- [PATCH] D154341: use StringMap in llvm-dwp when merging debug_str.dwo section
David Blaikie via Phabricator via llvm-commits
- [PATCH] D154341: use StringMap in llvm-dwp when merging debug_str.dwo section
David Blaikie via Phabricator via llvm-commits
- [llvm] aa82b56 - [CodeGen] MRI call back in TargetMachine
Yashwant Singh via llvm-commits
- [PATCH] D143758: [CodeGen] MRI call back in TargetMachine
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D151465: [Dexter] Remove builder from Dexter
Jeremy Morse via Phabricator via llvm-commits
- [PATCH] D154054: [CaptureTracking] Don't consider comparison of inbounds GEP with nonnull non-capturing
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getCPUDispatchMangling
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D143631: [LTO] Don't let InstCombine re-sink the vastly more expensive fdiv
David Sherwood via Phabricator via llvm-commits
- [PATCH] D153537: [AMDGPU] Do not wait for vscnt on function entry and return
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154362: [mlir][arith] Move getNeutralElement from Linalg utils to arith
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D153600: Implement -frecord-command-line for XCOFF
Jake Egan via Phabricator via llvm-commits
- [PATCH] D154363: [WIP][mlir] Add an interface to decompose complex ops
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D153600: Implement -frecord-command-line for XCOFF
Jake Egan via Phabricator via llvm-commits
- [PATCH] D154364: [LTO] Allow library calls to be internalized in freestanding mode
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D153600: Implement -frecord-command-line for XCOFF
Jake Egan via Phabricator via llvm-commits
- [PATCH] D154364: [LTO] Allow library calls to be internalized in freestanding mode
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D154362: [mlir][arith] Move getNeutralElement from Linalg utils to arith
Nicolas Vasilache via Phabricator via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpaceInfo to deduce address spaces
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D151545: [ASAN] Support memeory check for masked.gather/scatter.
Craig Topper via Phabricator via llvm-commits
- [llvm] e561eda - [LV] Prepare tests for D154261.
Florian Hahn via llvm-commits
- [PATCH] D154364: [LTO] Allow library calls to be internalized in freestanding mode
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D154261: [LV] Consider if scalar epilogue is required in getMaximizedVFForTarget.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154193: [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154261: [LV] Consider if scalar epilogue is required in getMaximizedVFForTarget.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D135849: [llvm] Return canonical virtual path from `RedirectingFileSystem`
Ben Langmuir via Phabricator via llvm-commits
- [PATCH] D154364: [LTO] Allow library calls to be internalized in freestanding mode
Joseph Huber via Phabricator via llvm-commits
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- [llvm] a90ac20 - [MemoryEffects][NFCI] Make the MemoryEffects class reusable
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- [PATCH] D154369: [PowerPC] Add DFP quantum adjustment instruction definitions and MC tests
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- [llvm] 02591d2 - [LSR] Add test for another normalization miscompile.
Florian Hahn via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
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- [PATCH] D154187: [InstCombine] Add test cases from PR63321. NFC.
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- [llvm] fac4857 - [llvm-exegesis] Disable tests requiring the subprocess executor
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- [PATCH] D152658: [InstCombine] Change SimplifyDemandedVectorElts to use PoisonElts instead of UndefElts
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- [PATCH] D153600: Implement -frecord-command-line for XCOFF
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- [PATCH] D149439: [yaml2obj] Add support fot structured section data.
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- [llvm] e578b3b - [InstSimplify] Fold all global variables with initializers
Anshil Gandhi via llvm-commits
- [PATCH] D152145: [InstSimplify] Fold all global variables with initializers
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- [PATCH] D154309: [LV] Do not add load to group if it moves across conflicting store.
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- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
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- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
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- [PATCH] D153740: [llvm][Support] Deprecate llvm::writeFileAtomically API
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- [PATCH] D154288: [DWARFLinker][NFC] Remove RangesTy &getValidAddressRanges().
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- [PATCH] D149091: [Object] Recognize ARM64EC binaries in COFFObjectFile::getMachine.
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- [llvm] b4efc0f - [LV] Break up condition in selectEpilogueVectorizationFactor loop (NFCI)
Florian Hahn via llvm-commits
- [PATCH] D154264: [LV] Skip VFs < iterations remaining for epilogue vectorization.
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- [PATCH] D154173: [LAA] Add test that shows MaxSafeDepDistBytes is incorrect. NFC.
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- [PATCH] D154392: [llvm] Remove uses of Type::getPointerTo() (NFC)
Youngsuk Kim via Phabricator via llvm-commits
- [PATCH] D154266: [RISCV] Add VFCVT pseudos with no mask
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- [PATCH] D154240: [LV] Update generateInstruction to return produced value (NFC).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154240: [LV] Update generateInstruction to return produced value (NFC).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D153911: [cmake] Add -Wcast-qual to C flags if LLVM_ENABLE_WARNINGS is defined.
Alex MacLean via Phabricator via llvm-commits
- [PATCH] D153600: Implement -frecord-command-line for XCOFF
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- [PATCH] D154394: [PowerPC] Add DFP conversion instructions definitions and MC tests
Lei Huang via Phabricator via llvm-commits
- [PATCH] D154266: [RISCV] Add VFCVT pseudos with no mask
Luke Lau via Phabricator via llvm-commits
- [llvm] 49899cd - [RISCV] Refactor vfcvt_rm pseudo insertion case statements. NFC
Luke Lau via llvm-commits
- [PATCH] D154258: [RISCV] Refactor vfcvt_rm pseudo insertion case statements. NFC
Luke Lau via Phabricator via llvm-commits
- [llvm] 1a715d9 - [RISCV] Support constant operand for la and lla pseudoinstruction.
Craig Topper via llvm-commits
- [PATCH] D150133: [RISCV] Support constant operand for la and lla pseudoinstruction.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153544: [AMDGPU] Use V_FMA_MIX* more often
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- [llvm] aafdc9e - [Attributor] Make isImpliedByIR and hasAssumedIRAttr more useful
Johannes Doerfert via llvm-commits
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Johannes Doerfert via llvm-commits
- [PATCH] D141189: [Mips] Set setMaxAtomicSizeInBitsSupported
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- [PATCH] D141189: [Mips] Set setMaxAtomicSizeInBitsSupported
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- [PATCH] D153600: Implement -frecord-command-line for XCOFF
Jake Egan via Phabricator via llvm-commits
- [PATCH] D154395: [llvm] Add triple for SerenityOS
Andrew Kaster via Phabricator via llvm-commits
- [PATCH] D151284: [RISCV] Custom lower FP_TO_FP16 and FP16_TO_FP to correct ABI of of libcall
Zixuan Wu via Phabricator via llvm-commits
- [PATCH] D154399: [llvm] Allow undefined symbols on SerenityOS
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Andrew Kaster via Phabricator via llvm-commits
- [PATCH] D154401: [tools] Support building shared libLLVM and libClang for SerenityOS
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- [PATCH] D154402: [compiler-rt] Enable profile instrumentation for SerenityOS
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Andrew Kaster via Phabricator via llvm-commits
- [PATCH] D153948: [RISCV][NFC] Refactor lowerToScalableOp.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D141189: [Mips] Set setMaxAtomicSizeInBitsSupported
YunQiang Su via Phabricator via llvm-commits
- [PATCH] D154193: [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getCPUDispatchMangling
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Hubert Tong via Phabricator via llvm-commits
- [PATCH] D154193: [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
Kan Shengchen via Phabricator via llvm-commits
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Lei Huang via Phabricator via llvm-commits
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Ties Stuij via llvm-commits
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- [llvm] 12025ce - [CostModel] Use min/max intrinsics for vecreduce.min/max costs
David Green via llvm-commits
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- [PATCH] D153548: [TTI][AArch64] Add basic vector_reduce_fmaximum/vector_reduce_fminimum costmodelling
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- [PATCH] D153148: [InstCombine] Fold `(-1 + A) & B` into `A ? 0 : B` where A is effectively a bool
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D152832: [AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.
Valery Pykhtin via Phabricator via llvm-commits
- [PATCH] D154369: [PowerPC] Add DFP quantum adjustment instruction definitions and MC tests
Lei Huang via Phabricator via llvm-commits
- [PATCH] D152921: [lld] Synthesize metadata for MTE globals
Peter Smith via Phabricator via llvm-commits
- [PATCH] D152832: [AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Ron Lieberman via Phabricator via llvm-commits
- [PATCH] D153800: [ARM] Adjust strd/ldrd codegen alignment requirements
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D154394: [PowerPC] Add DFP conversion instructions definitions and MC tests
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D154369: [PowerPC] Add DFP quantum adjustment instruction definitions and MC tests
Lei Huang via Phabricator via llvm-commits
- [PATCH] D153698: [InstCombine] canonicalize multi xor as cmp+select
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D153148: [InstCombine] Fold `(-1 + A) & B` into `A ? 0 : B` where A is effectively a bool
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D153949: [Attributor] Convert test to opaque pointers (NFC)
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D153963: [InstCombine] Fold binop of select and cast of select condition
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpaceInfo to deduce address spaces
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D154447: [PowerPC] Improve code gen for vector add
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D154369: [PowerPC] Add DFP quantum adjustment instruction definitions and MC tests
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D154264: [LV] Skip VFs < iterations remaining for epilogue vectorization.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D154394: [PowerPC] Add DFP conversion instructions definitions and MC tests
Lei Huang via Phabricator via llvm-commits
- [llvm] a167976 - [MC] Use ParseStatus in generated AsmParser methods
Sergei Barannikov via llvm-commits
- [PATCH] D154303: [MC] Use ParseStatus in generated AsmParser methods
Sergei Barannikov via Phabricator via llvm-commits
- [llvm] d229184 - [PowerPC] Add DFP quantum adjustment instruction definitions and MC tests
Lei Huang via llvm-commits
- [PATCH] D154369: [PowerPC] Add DFP quantum adjustment instruction definitions and MC tests
Lei Huang via Phabricator via llvm-commits
- [llvm] 4c691ae - [M68k] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via llvm-commits
- [PATCH] D154320: [M68k] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D154394: [PowerPC] Add DFP conversion instructions definitions and MC tests
Lei Huang via Phabricator via llvm-commits
- [llvm] 23691bb - [CSKY] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via llvm-commits
- [PATCH] D154315: [CSKY] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via Phabricator via llvm-commits
- [llvm] cc6fabf - [LoongArch] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via llvm-commits
- [PATCH] D154318: [LoongArch] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via Phabricator via llvm-commits
- [llvm] d73c8c8 - [AMDGPU] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via llvm-commits
- [PATCH] D154293: [AMDGPU] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153600: Implement -frecord-command-line for XCOFF
Jake Egan via Phabricator via llvm-commits
- [llvm] b4b532a - [RISCV] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via llvm-commits
- [PATCH] D154291: [RISCV] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D154394: [PowerPC] Add DFP conversion instructions definitions and MC tests
Lei Huang via Phabricator via llvm-commits
- [PATCH] D138433: Allow setting LLVM_EXPERIMENTAL_TARGETS_TO_BUILD to "all"
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153600: Implement -frecord-command-line for XCOFF
Jake Egan via Phabricator via llvm-commits
- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
Brian Gesiak via Phabricator via llvm-commits
- [PATCH] D151312: [PowerPC][AIX] Enable quadword atomics by default for AIX
Hubert Tong via Phabricator via llvm-commits
- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
Brian Gesiak via Phabricator via llvm-commits
- [PATCH] D154261: [LV] Consider if scalar epilogue is required in getMaximizedVFForTarget.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D154193: [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
Craig Topper via Phabricator via llvm-commits
- [llvm] 1746ac4 - [LV] Forget SCEVs for exit phis after vectorization.
Florian Hahn via llvm-commits
- [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [llvm] cf57fcf - [FileCheck, 1/4] NFC: Switch ExpressionValue to APInt
Thomas Preud'homme via llvm-commits
- [PATCH] D154428: [FileCheck, 1/4] NFC: Switch ExpressionValue to APInt
Thomas Preud'homme via Phabricator via llvm-commits
- [llvm] fc0d1c0 - [FileCheck, 2/4] NFC: Switch to APInt getter for ExpressionValue
Thomas Preud'homme via llvm-commits
- [PATCH] D154429: [FileCheck, 2/4] NFC: Switch to APInt getter for ExpressionValue
Thomas Preud'homme via Phabricator via llvm-commits
- [PATCH] D154261: [LV] Consider if scalar epilogue is required in getMaximizedVFForTarget.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154351: [llvm][TableGen][Jupyter] Record current python when kernel is installed
Andrzej Warzynski via Phabricator via llvm-commits
- [PATCH] D154447: [PowerPC] Improve code gen for vector add
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D150880: [RFC, FileCheck, 3/4] Allow AP value for numeric expressions
Thomas Preud'homme via Phabricator via llvm-commits
- [llvm] fda24e8 - [MC/AsmParser] Remove no-op overrides of parseDirective (NFC)
Sergei Barannikov via llvm-commits
- [PATCH] D154101: [MC] Add three-state parseDirective as a replacement for ParseDirective
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D150880: [RFC, FileCheck, 3/4] Allow AP value for numeric expressions
Thomas Preud'homme via Phabricator via llvm-commits
- [PATCH] D154463: [SLPVectorize] Add support for fmaximum/fminimum reduction
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D154463: [SLPVectorize] Add support for fmaximum/fminimum reduction
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D154430: [FileCheck, 4/4] NFC: Stop using ExpressionValue
Thomas Preud'homme via Phabricator via llvm-commits
- [PATCH] D154430: [FileCheck, 4/4] NFC: Stop using ExpressionValue
Thomas Preud'homme via Phabricator via llvm-commits
- [compiler-rt] f171c76 - [ASanAbi][Darwin] Build ios stable ABI library
Blue Gaston via llvm-commits
- [PATCH] D154261: [LV] Consider if scalar epilogue is required in getMaximizedVFForTarget.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154465: [PowerPC] Add DFP format instructions definitions and MC tests
Lei Huang via Phabricator via llvm-commits
- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
Chris Lattner via Phabricator via llvm-commits
- [PATCH] D152832: [AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.
Valery Pykhtin via Phabricator via llvm-commits
- [PATCH] D154465: [PowerPC] Add DFP format instructions definitions and MC tests
Lei Huang via Phabricator via llvm-commits
- [PATCH] D154394: [PowerPC] Add DFP conversion instructions definitions and MC tests
Lei Huang via Phabricator via llvm-commits
- [PATCH] D149439: [yaml2obj] Add support fot structured section data.
Jacek Caban via Phabricator via llvm-commits
- [PATCH] D151911: [LVI] Handle icmp of ashr.
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D149440: [yaml2obj] Add support for load config section data.
Jacek Caban via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
Dan Liew via Phabricator via llvm-commits
- [PATCH] D149091: [Object] Recognize ARM64EC binaries in COFFObjectFile::getMachine.
Jacek Caban via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
Dan Liew via Phabricator via llvm-commits
- [PATCH] D154463: [SLPVectorize] Add support for fmaximum/fminimum reduction
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D149093: [llvm-objdump] [NFC] Factor out DisassemblerTarget class.
Jacek Caban via Phabricator via llvm-commits
- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
Dan Liew via Phabricator via llvm-commits
- [PATCH] D154198: [JITLink][PowerPC] Add TOC and relocations for ppc64
Lang Hames via Phabricator via llvm-commits
- [llvm] f2977fc - [ASAN] Support memeory check for masked.gather/scatter.
Yeting Kuo via llvm-commits
- [PATCH] D151545: [ASAN] Support memeory check for masked.gather/scatter.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154193: [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D154193: [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149775: [AMDGPU] Reserve SGPR pair when long branches are present
Corbin Robeck via Phabricator via llvm-commits
- [PATCH] D154193: [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
Wang, Xin via Phabricator via llvm-commits
- [llvm] b4067de - [RISCV] Rename RVInstBitManipRII->CVInstBitManipRII since it belongs to XVendorCV. NFC
Craig Topper via llvm-commits
- [PATCH] D154193: [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D154412: [RISCV] Add support for XCVbi extension in CV32E40P
Funan Zeng via Phabricator via llvm-commits
- [llvm] 6c72cee - [RISCV] Fix 80 column violations in RISCVInstrInfoXCV.td. NFC
Craig Topper via llvm-commits
- [PATCH] D154412: [RISCV] Add support for XCVbi extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151312: [PowerPC][AIX] Enable quadword atomics by default for AIX
Kai Luo via Phabricator via llvm-commits
- [PATCH] D154412: [RISCV] Add support for XCVbi extension in CV32E40P
Funan Zeng via Phabricator via llvm-commits
- [PATCH] D154212: [cmake] Add LLVM_UNITTEST_LINK_FLAGS option
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D151312: [PowerPC][AIX] Enable quadword atomics by default for AIX
Hubert Tong via Phabricator via llvm-commits
- [PATCH] D143052: [CMake] Replace llvm_check_linker_flag and llvm_check_compiler_linker_flag
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D151312: [PowerPC][AIX] Enable quadword atomics by default for AIX
Kai Luo via Phabricator via llvm-commits
- [PATCH] D151312: [PowerPC][AIX] Enable quadword atomics by default for AIX
Hubert Tong via Phabricator via llvm-commits
- [PATCH] D154470: [AMDGPU] Fix ISD perm compute known bits wrong.
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D151312: [PowerPC][AIX] Enable quadword atomics by default for AIX
Kai Luo via Phabricator via llvm-commits
- [PATCH] D151312: [PowerPC][AIX] Enable quadword atomics by default for AIX
Hubert Tong via Phabricator via llvm-commits
- [PATCH] D149759: [symbolizer] Support symbol lookup
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D151312: [PowerPC][AIX] Enable quadword atomics by default for AIX
Kai Luo via Phabricator via llvm-commits
- [PATCH] D153698: [InstCombine] canonicalize multi xor as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D153698: [InstCombine] canonicalize multi xor as cmp+select
Allen zhong via Phabricator via llvm-commits
- [PATCH] D153839: [XCOFF] Force recording a relocation for weak symbol label.
ChenZheng via Phabricator via llvm-commits
- [PATCH] D154198: [JITLink][PowerPC] Add TOC and relocations for ppc64
Kai Luo via Phabricator via llvm-commits
- [PATCH] D154198: [JITLink][PowerPC] Add TOC and relocations for ppc64
Kai Luo via Phabricator via llvm-commits
- [llvm] 2d74cf1 - [XCOFF] Force recording a relocation for weak symbol label.
via llvm-commits
- [PATCH] D153839: [XCOFF] Force recording a relocation for weak symbol label.
Esme Yi via Phabricator via llvm-commits
- [PATCH] D154472: add initializetion for EmitCompactUnwindNonCanonical in ctor
Chen Cheng via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Vlad Serebrennikov via Phabricator via llvm-commits
- [PATCH] D153148: [InstCombine] Fold `(-1 + A) & B` into `A ? 0 : B` where A is effectively a bool
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable
Mel Chen via Phabricator via llvm-commits
- [PATCH] D148244: [IRCE] Support inverted range check's predicate
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D153762: [LoopPeel] Clear dispositions after peeling
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154470: [AMDGPU] Fix ISD perm compute known bits wrong.
Jay Foad via Phabricator via llvm-commits
- [llvm] c0011f0 - [cmake] Add LLVM_UNITTEST_LINK_FLAGS option
Nikita Popov via llvm-commits
- [PATCH] D154212: [cmake] Add LLVM_UNITTEST_LINK_FLAGS option
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
Manish Kausik H via Phabricator via llvm-commits
- [llvm] c67ada2 - [Attributor] Convert test to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [PATCH] D153949: [Attributor] Convert test to opaque pointers (NFC)
Nikita Popov via Phabricator via llvm-commits
- [llvm] 8c6aea6 - [GVNHoist] Convert test to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] 7905c48 - [LoopUnroll] Add test for early add folding (NFC)
Nikita Popov via llvm-commits
- [PATCH] D154323: [MemoryDependencyAnalysis] Delete cache infos if CacheInfo->size != Loc.size
luxufan via Phabricator via llvm-commits
- [llvm] 64e289c - [IRCE] Support inverted range check's predicate
Aleksandr Popov via llvm-commits
- [PATCH] D154206: [InstCombine] Fold comparison of usub.sat
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D148244: [IRCE] Support inverted range check's predicate
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D154480: [AMDGPU] Flush vmcnt with any loop extraneous defs
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D154206: [InstCombine] Fold comparison of usub.sat
Dhruv Chawla via Phabricator via llvm-commits
- [llvm] b9808e5 - [LoopUnroll] Fold add chains during unrolling
Nikita Popov via llvm-commits
- [PATCH] D153540: [LoopUnroll] Fold add chains during unrolling
Nikita Popov via Phabricator via llvm-commits
- [llvm] 535693f - [llvm][TableGen][Jupyter] Record current python when kernel is installed
David Spickett via llvm-commits
- [PATCH] D154351: [llvm][TableGen][Jupyter] Record current python when kernel is installed
David Spickett via Phabricator via llvm-commits
- [llvm] dacbf4a - [llvm][TableGen][Jupyter] Note an easily encountered error
David Spickett via llvm-commits
- [PATCH] D154342: [InstCombine] Test cases for D154206
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D154206: [InstCombine] Fold comparison of usub.sat
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D154206: [InstCombine] Fold comparison of usub.sat
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154342: [InstCombine] Test cases for D154206
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D154482: [AMDGPU] Flush vmcnt in preheader for loops with loads
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D154482: [AMDGPU] Flush vmcnt in preheader for loops with loads
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D151696: [X86] Remove CPU_SPECIFIC* MACROs and add getCPUDispatchMangling
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D154217: [AArch64] Use known zero bits when creating BIC
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D149759: [symbolizer] Support symbol lookup
James Henderson via Phabricator via llvm-commits
- [PATCH] D149093: [llvm-objdump] [NFC] Factor out DisassemblerTarget class.
James Henderson via Phabricator via llvm-commits
- [PATCH] D149091: [Object] Recognize ARM64EC binaries in COFFObjectFile::getMachine.
James Henderson via Phabricator via llvm-commits
- [PATCH] D149091: [Object] Recognize ARM64EC binaries in COFFObjectFile::getMachine.
James Henderson via Phabricator via llvm-commits
- [PATCH] D153544: [AMDGPU] Use V_FMA_MIX* more often
Mateja Marjanovic via Phabricator via llvm-commits
- [PATCH] D149440: [yaml2obj] Add support for load config section data.
James Henderson via Phabricator via llvm-commits
- [llvm] 2c93cfa - [llvm][TableGen][Jupyter] Note needed restart when using an IDE
David Spickett via llvm-commits
- [PATCH] D149439: [yaml2obj] Add support fot structured section data.
James Henderson via Phabricator via llvm-commits
- [llvm] ee165cd - [AMDGPU] Eliminate SIMCCodeEmitter and de-virtualise encoding methods.
Ivan Kosarev via llvm-commits
- [PATCH] D154337: [AMDGPU] Eliminate SIMCCodeEmitter and de-virtualise encoding methods.
Ivan Kosarev via Phabricator via llvm-commits
- [llvm] df93ebe - [gn build] Port ee165cdb1b8b
LLVM GN Syncbot via llvm-commits
- [llvm] 5ae7fde - [AMDGPU][NFC] Rename SIMCCodeEmitter.cpp to match the new emitter class name.
Ivan Kosarev via llvm-commits
- [PATCH] D154426: [AMDGPU][NFC] Rename SIMCCodeEmitter.cpp to match the new emitter class name.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D153758: [AMDGPU] Use GlobalISel MatchTable Combiner Backend
Pierre van Houtryve via Phabricator via llvm-commits
- [llvm] 4b8162f - [RISCV][test] Add test coverage for llvm.frexp.*.* intrinsics
Alex Bradbury via llvm-commits
- [PATCH] D153850: [AArch64] Use GlobalISel MatchTable Combiner Backend
Pierre van Houtryve via Phabricator via llvm-commits
- [llvm] 29d571f - [AMDGPU] Fix expensive-checks build.
Ivan Kosarev via llvm-commits
- [PATCH] D153861: [MIPS] Use GlobalISel MatchTable Combiner Backend
Pierre van Houtryve via Phabricator via llvm-commits
- [llvm] 80c5698 - Revert "[RISCV][test] Add test coverage for llvm.frexp.*.* intrinsics"
Alex Bradbury via llvm-commits
- [llvm] 7717c00 - [X86] Remove CPU_SPECIFIC* MACROs and add getCPUDispatchMangling
Freddy Ye via llvm-commits
- [PATCH] D151696: [X86] Remove CPU_SPECIFIC* MACROs and add getCPUDispatchMangling
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D151696: [X86] Remove CPU_SPECIFIC* MACROs and add getCPUDispatchMangling
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- [PATCH] D154487: [RISCV][NFC] Use common prefix to simlify test.
Jianjian Guan via Phabricator via llvm-commits
- [llvm] 7de4c6f - [RISCV][test] Add test coverage for llvm.frexp.*.* intrinsics
Alex Bradbury via llvm-commits
- [llvm] dac5957 - [AMDGPU][AsmParser][NFC] Clean up the implementation of KImmFP operands.
Ivan Kosarev via llvm-commits
- [PATCH] D154427: [AMDGPU][AsmParser][NFC] Clean up the implementation of KImmFP operands.
Ivan Kosarev via Phabricator via llvm-commits
- [llvm] 12460cf - [AMDGPU][AsmParser] Simplify the implementation of SWZ operands.
Ivan Kosarev via llvm-commits
- [PATCH] D154432: [AMDGPU][AsmParser] Simplify the implementation of SWZ operands.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D154480: [AMDGPU] Flush vmcnt with any loop extraneous defs
Jay Foad via Phabricator via llvm-commits
- [PATCH] D154488: [PowerPC] Define SchedModel for Power8
Qiu Chaofan via Phabricator via llvm-commits
- [llvm] 7208fde - [AMDGPU][AsmParser][NFC] Generate printers for named-bit operands automatically.
Ivan Kosarev via llvm-commits
- [PATCH] D154433: [AMDGPU][AsmParser][NFC] Generate printers for named-bit operands automatically.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D154363: [mlir] Add an interface to decompose complex ops
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D154342: [InstCombine] Test cases for D154206
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- [PATCH] D154363: [mlir] Add an interface to decompose complex ops
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- [PATCH] D154342: [InstCombine] Test cases for D154206
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- [llvm] 8d38568 - [ValueTracking] Don't handle ptrtoint with mismatches sizes
Nikita Popov via llvm-commits
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Alex Bradbury via llvm-commits
- [PATCH] D154206: [InstCombine] Fold comparison of usub.sat
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- [PATCH] D154496: InstCombine: Fold ldexp(ldexp(x, a), b) -> ldexp(x, a + b)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D148216: Add support for annotations in UpdateTestChecks (NFC)
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Henrik G. Olsson via llvm-commits
- [PATCH] D154342: [InstCombine] Test cases for D154206
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Fabio D'Urso via llvm-commits
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- [PATCH] D153023: AMDGPU: Correctly lower llvm.log.f32 and llvm.log10.f32
Matt Arsenault via Phabricator via llvm-commits
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- [PATCH] D154206: [InstCombine] Fold comparison of usub.sat
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- [llvm] 6d64faf - [UTC] Fix git URL regex
Henrik G. Olsson via llvm-commits
- [PATCH] D154504: [UTC] Fix git URL regex
Henrik G Olsson via Phabricator via llvm-commits
- [PATCH] D154504: [UTC] Fix git URL regex
Henrik G Olsson via Phabricator via llvm-commits
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Nikita Popov via Phabricator via llvm-commits
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Jacek Caban via Phabricator via llvm-commits
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- [llvm] 9ce0641 - [Kaleidoscope] Fix race condition in order-of-destruction between SectionMemoryManager and its MemoryMapper
Stefan Gränitz via llvm-commits
- [PATCH] D154338: Fix race condition in order-of-destruction between SectionMemoryManager and its MemoryMapper
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D107087: Fix SectionMemoryManager deconstruction error with MSVC
Stefan Gränitz via Phabricator via llvm-commits
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- [llvm] 4a49226 - [OpenMP] Change clang emitTargetDataCalls to use OMPIRBuilder
Akash Banerjee via llvm-commits
- [PATCH] D154506: [ARM] in LowerConstantFP, make sure we cover armv6-m execute-only
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D152333: update_mir_test_checks.py doesn't separate different prefix checks #63112
Eddie Phillips via Phabricator via llvm-commits
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Eddie Phillips via Phabricator via llvm-commits
- [PATCH] D107087: Fix SectionMemoryManager deconstruction error with MSVC
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Jacek Caban via Phabricator via llvm-commits
- [llvm] 0e71bb3 - [InstCombine] Test cases for D154206
Dhruv Chawla via llvm-commits
- [llvm] b66006f - [InstCombine] Fold icmps comparing usub_sat with a constant
Dhruv Chawla via llvm-commits
- [PATCH] D154342: [InstCombine] Test cases for D154206
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- [PATCH] D154206: [InstCombine] Fold comparison of usub.sat
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- [llvm] bd6e5c0 - [InstCombine] Add tests for add+icmp assumes (NFC)
Nikita Popov via llvm-commits
- [PATCH] D154490: [libunwind] Add missing alloca.h include
Steven van der Schoot via Phabricator via llvm-commits
- [PATCH] D154508: [TLI][AArch64] Add mappings to vectorized functions from ArmPL
mgabka via Phabricator via llvm-commits
- [PATCH] D154314: [LV] Prefer the tail fold according the the user hint
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- [PATCH] D133103: [PowerPC] Improve kill flag computation and add verification after MI peephole
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D154508: [TLI][AArch64] Add mappings to vectorized functions from ArmPL
mgabka via Phabricator via llvm-commits
- [PATCH] D154506: [ARM] in LowerConstantFP, make sure we cover armv6-m execute-only
Dave Green via Phabricator via llvm-commits
- [PATCH] D154506: [ARM] in LowerConstantFP, make sure we cover armv6-m execute-only
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D154504: [UTC] Fix git URL regex
Henrik G Olsson via Phabricator via llvm-commits
- [llvm] 2e0af16 - [ValueTracking] Support add+icmp assumes for KnownBits
Nikita Popov via llvm-commits
- [llvm] 4488ee2 - [UTC] Generalize version regex
Nikita Popov via llvm-commits
- [PATCH] D105759: Implement P2361 Unevaluated string literals
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D154504: [UTC] Fix git URL regex
Henrik G Olsson via Phabricator via llvm-commits
- [llvm] 86bd9a4 - [AArch64] Additional tests for creating BIC from known bits. NFC
David Green via llvm-commits
- [llvm] ae8f929 - [AArch64] Use known zero bits when creating BIC
David Green via llvm-commits
- [PATCH] D154217: [AArch64] Use known zero bits when creating BIC
Dave Green via Phabricator via llvm-commits
- [PATCH] D153963: [InstCombine] Fold binop of select and cast of select condition
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D154504: [UTC] Fix git URL regex
Henrik G Olsson via Phabricator via llvm-commits
- [PATCH] D154506: [ARM] in LowerConstantFP, make sure we cover armv6-m execute-only
Dave Green via Phabricator via llvm-commits
- [PATCH] D154266: [RISCV] Add VFCVT pseudos with no mask
Philip Reames via Phabricator via llvm-commits
- [PATCH] D154470: [AMDGPU] Fix ISD perm compute known bits wrong.
Jeffrey Byrnes via Phabricator via llvm-commits
- [llvm] b7e38ff - [InstCombine] Add old extract to worklist for DCE
Nikita Popov via llvm-commits
- [PATCH] D133103: [PowerPC] Improve kill flag computation and add verification after MI peephole
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D147697: [IR] Add TargetExtTypeClass
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D152333: update_mir_test_checks.py doesn't separate different prefix checks #63112
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D153859: RegisterCoalescer: Fix verifier error on redef of subregister for live out implicit_defs
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154496: InstCombine: Fold ldexp(ldexp(x, a), b) -> ldexp(x, a + b)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154496: InstCombine: Fold ldexp(ldexp(x, a), b) -> ldexp(x, a + b)
Jay Foad via Phabricator via llvm-commits
- [llvm] a32d14f - [X86] Fold BITOP(PACKSS(X,Z),PACKSS(Y,W)) --> PACKSS(BITOP(X,Y),BITOP(Z,W))
Simon Pilgrim via llvm-commits
- [llvm] 38721f2 - [X86] ComputeNumSignBitsForTargetNode - attempt to recognise PACKSSDW(PACKSSDW(X,Y),PACKSSDW(Z,W)) patterns
Simon Pilgrim via llvm-commits
- [PATCH] D99750: [LV, VP] RFC: VP intrinsics support for the Loop Vectorizer (Proof-of-Concept)
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D153600: Implement -frecord-command-line for XCOFF
Jake Egan via Phabricator via llvm-commits
- [PATCH] D153638: [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D154517: AMDGPU: Always use v_rcp_f16 and v_rsq_f16
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154435: [RISCV][NFC] Simplify uses of PatFrag binop_oneuse
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154487: [RISCV][NFC] Use common prefix to simlify test.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143631: [LTO] Ensure LICM hoists expensive fdiv instructions introduced by InstCombine
David Sherwood via Phabricator via llvm-commits
- [PATCH] D143631: [LTO] Ensure LICM hoists expensive fdiv instructions introduced by InstCombine
David Sherwood via Phabricator via llvm-commits
- [PATCH] D154520: [UTC] Adapt version matcher to glob CLANG_VENDOR
Henrik G Olsson via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D150856: [lit] Add %{for-each-file} substitution
Joel E. Denny via Phabricator via llvm-commits
- [PATCH] D153638: [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D145485: [PoC][IR] Generalize interleave/deinterleave intrinsics to factors > 2
Luke Lau via Phabricator via llvm-commits
- [llvm] 60be17a - [RISCV] Add VFCVT pseudos with no mask
Luke Lau via llvm-commits
- [PATCH] D154266: [RISCV] Add VFCVT pseudos with no mask
Luke Lau via Phabricator via llvm-commits
- [PATCH] D154522: [DAG] Improve combineCarryDiamond to accept (uaddo_carry X, 0, Carry)
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D154522: [DAG] Improve combineCarryDiamond to accept (uaddo_carry X, 0, Carry)
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D153864: [RISCV] Lower interleave2 intrinsics to vsseg2
Philip Reames via Phabricator via llvm-commits
- [PATCH] D153875: [RISCV] Add tests for vector.deinterleave2s of loads
Philip Reames via Phabricator via llvm-commits
- [PATCH] D154520: [UTC] Adapt version matcher to glob CLANG_VENDOR
Alex Brachet via Phabricator via llvm-commits
- [llvm] 7b54626 - [NFC] Fix indentation in addcarry.ll
Amaury Séchet via llvm-commits
- [PATCH] D154501: [JITLink][RISCV] Move relax to PostAllocationPasses
Jonas Hahnfeld via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Craig Topper via Phabricator via llvm-commits
- [llvm] 9efbb67 - [CMake] Add /winsysroot to lld-link when LLVM_WINSYSROOT is specified
Arthur Eubanks via llvm-commits
- [PATCH] D151946: [CMake] Add /winsysroot to lld-link when LLVM_WINSYSROOT is specified
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D154520: [UTC] Adapt version matcher to glob CLANG_VENDOR
Henrik G Olsson via Phabricator via llvm-commits
- [llvm] 7f20407 - [CodeGen] Add support for Splats in ComplexDeinterleaving pass
Igor Kirillov via llvm-commits
- [PATCH] D153355: [CodeGen] Add support for Splats in ComplexDeinterleaving pass
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D152928: [RFC][DAG] Initially add nodes in the worklist in topological order.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D153376: Introducing llvm-cm: A Cost Model Tool
Dayann D'almeida via Phabricator via llvm-commits
- [llvm] 68f5d1b - [UTC] Adapt version matcher to glob CLANG_VENDOR
Alex Brachet via llvm-commits
- [PATCH] D154520: [UTC] Adapt version matcher to glob CLANG_VENDOR
Alex Brachet via Phabricator via llvm-commits
- [llvm] 69ca5c9 - [SCEV] Add flag to control invertible check for normalization.
Florian Hahn via llvm-commits
- [PATCH] D154525: [llvm-mca][RISCV] Fix typo in test for vsetvli instruction
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D153004: [LSR] Consider post-inc form when creating extends/truncates.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154526: [llvm-mca][RISCV] vsetivli and vsetvli act as instruments
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D154480: [AMDGPU] Flush vmcnt with any loop extraneous defs
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152832: [AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152832: [AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154527: [AMDGPU] Add GlobalISel test coverage for floating-point truncations.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D154173: [LAA] Add test that shows MaxSafeDepDistBytes is incorrect. NFC.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D153963: [InstCombine] Fold binop of select and cast of select condition
Noah Goldstein via Phabricator via llvm-commits
- [llvm] 163aad6 - [SystemZ][z/OS] z/OS ADA codegen and emission
Yusra Syeda via llvm-commits
- [PATCH] D153788: [SystemZ][z/OS] z/OS ADA codegen and emission
Yusra Syeda via Phabricator via llvm-commits
- [PATCH] D123804: [WIP][clang][lld] A Unified LTO Bitcode Frontend
Matthew Voss via Phabricator via llvm-commits
- [PATCH] D123969: [LTO] Use names from more GlobalValue types to generate the ModuleID
Matthew Voss via Phabricator via llvm-commits
- [PATCH] D136101: [Take 2:] Make opt-viewer more usable by general developers - part 1/N
Justin Cady via Phabricator via llvm-commits
- [PATCH] D152333: update_mir_test_checks.py doesn't separate different prefix checks #63112
Eddie Phillips via Phabricator via llvm-commits
- [PATCH] D154501: [JITLink][RISCV] Move relax to PostAllocationPasses
Lang Hames via Phabricator via llvm-commits
- [PATCH] D154533: [DAG] Improve carry reconstruction in combineCarryDiamond.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
Manish Kausik H via Phabricator via llvm-commits
- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
Manish Kausik H via Phabricator via llvm-commits
- [PATCH] D151021: [llvm-exegesis] Introduce Subprocess Executor Mode
Hafiz Abid Qadeer via Phabricator via llvm-commits
- [PATCH] D151021: [llvm-exegesis] Introduce Subprocess Executor Mode
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D147544: [BOLT] Move from RuntimeDyld to JITLink
Rafael Auler via Phabricator via llvm-commits
- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
Brian Gesiak via Phabricator via llvm-commits
- [PATCH] D153876: [RISCV] Lower deinterleave2 intrinsics to vlseg2
Luke Lau via Phabricator via llvm-commits
- [PATCH] D123803: [WIP][llvm] A Unified LTO Bitcode Frontend
Matthew Voss via Phabricator via llvm-commits
- [PATCH] D41766: [MachineCombiner] Add check for optimal pattern order.
Florian Hahn via Phabricator via llvm-commits
- [llvm] d914686 - [RISCV] Add tests for stores of vector.interleave2
Luke Lau via llvm-commits
- [llvm] 70093fc - [RISCV] Lower interleave2 intrinsics to vsseg2
Luke Lau via llvm-commits
- [llvm] 86a9bbf - [RISCV] Add tests for vector.deinterleave2s of loads
Luke Lau via llvm-commits
- [llvm] ea62fc7 - [RISCV] Lower deinterleave2 intrinsics to vlseg2
Luke Lau via llvm-commits
- [PATCH] D153863: [RISCV] Add tests for stores of vector.interleave2
Luke Lau via Phabricator via llvm-commits
- [PATCH] D153875: [RISCV] Add tests for vector.deinterleave2s of loads
Luke Lau via Phabricator via llvm-commits
- [PATCH] D153864: [RISCV] Lower interleave2 intrinsics to vsseg2
Luke Lau via Phabricator via llvm-commits
- [PATCH] D153876: [RISCV] Lower deinterleave2 intrinsics to vlseg2
Luke Lau via Phabricator via llvm-commits
- [PATCH] D154341: use StringMap in llvm-dwp when merging debug_str.dwo section
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154535: [RISCV] Add tests for unaligned segmented loads and stores
Luke Lau via Phabricator via llvm-commits
- [PATCH] D154536: [RISCV] Check for alignment when lowering interleaved/deinterleaved loads/stores
Luke Lau via Phabricator via llvm-commits
- [PATCH] D154141: [RISCV] Remove legacy TA/TU pseudo distinction for load instructions
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149848: [AArch64, compiler-rt] Implement trampoline intrinsics
Lou via Phabricator via llvm-commits
- [PATCH] D147944: [LV][NFC] Improve complexity of fixing users of reductions
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D154341: use StringMap in llvm-dwp when merging debug_str.dwo section
David Blaikie via Phabricator via llvm-commits
- [PATCH] D138846: MC/DC in LLVM Source-Based Code Coverage: LLVM back-end and compiler-rt
Ellis Hoag via Phabricator via llvm-commits
- [PATCH] D151942: [BOLT] Instrumentation: AArch64 instrumentation support in runtime
Rafael Auler via Phabricator via llvm-commits
- [PATCH] D154537: AMDGPU: Fold out sign bit ops on frexp_exp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154309: [LV] Do not add load to group if it moves across conflicting store.
Anna Thomas via Phabricator via llvm-commits
- [PATCH] D135849: [llvm] Return canonical virtual path from `RedirectingFileSystem`
Jan Svoboda via Phabricator via llvm-commits
- [PATCH] D153023: AMDGPU: Correctly lower llvm.log.f32 and llvm.log10.f32
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D152231: [CodeGen] Disable default copy ctor and copy assignment operator for class Array
David Blaikie via Phabricator via llvm-commits
- [llvm] 1039aec - [RISCV] Fix interleave/deinterleave store test output
Luke Lau via llvm-commits
- [llvm] 2265bb0 - [LV] Update generateInstruction to return produced value (NFC).
Florian Hahn via llvm-commits
- [PATCH] D154240: [LV] Update generateInstruction to return produced value (NFC).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152095: [Verifier] definition subprograms cannot be nested within DICompositeType when enabling ODR.
David Blaikie via Phabricator via llvm-commits
- [PATCH] D154114: [SLP] Provide an universal interface for FixedVectorType::get. NFC.
Valeriy Dmitriev via Phabricator via llvm-commits
- [PATCH] D81833: [X86][FPEnv] Lowering of {get,set,reset}_fpenv
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D149367: Emit the CodeView `S_ARMSWITCHTABLE` debug symbol for jump tables
Daniel Paoliello via Phabricator via llvm-commits
- [PATCH] D149083: [PowerPC] Optimize VPERM and fix code order for swapping vector operands on LE
Maryam Moghadas via Phabricator via llvm-commits
- [PATCH] D149367: Emit the CodeView `S_ARMSWITCHTABLE` debug symbol for jump tables
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- [PATCH] D154126: [InstCombine] Transform (A > 0) | (A < 0) -> zext (A != 0) fold
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- [PATCH] D154021: [BOLT][NFCI] Use MetadataRewriter interface to update SDT markers
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D154022: [BOLT][NFCI] Migrate pseudo probes to MetadataRewriter interface
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D154023: [BOLT][NFCI] Move ProbeDecoder to PseudoProbeRewriter
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- [PATCH] D154024: [BOLT][NFCI] Migrate Linux Kernel handling code to MetadataRewriter
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- [PATCH] D154571: [emacs] Highlight 'zeroext' keyword as an attribute
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154571: [emacs] Highlight 'zeroext' keyword as an attribute
Nikita Popov via Phabricator via llvm-commits
- [llvm] 8f6e7b2 - [ModRef] Use enum class for IRMemLocation (NFC)
Nikita Popov via llvm-commits
- [PATCH] D153305: [MemoryEffects][NFCI] Make the MemoryEffects class reusable
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154572: [RISCV] Use 'long' in aes64 Zknd/Zkne builtin tests.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153376: Introducing llvm-cm: A Cost Model Tool
James Henderson via Phabricator via llvm-commits
- [PATCH] D151021: [llvm-exegesis] Introduce Subprocess Executor Mode
Danila Malyutin via Phabricator via llvm-commits
- [PATCH] D150758: [AIX] make integrated-as as default on AIX.
Esme Yi via Phabricator via llvm-commits
- [PATCH] D149091: [Object] Recognize ARM64EC binaries in COFFObjectFile::getMachine.
James Henderson via Phabricator via llvm-commits
- [PATCH] D154508: [TLI][AArch64] Add mappings to vectorized functions from ArmPL
mgabka via Phabricator via llvm-commits
- [PATCH] D153262: [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE
James Henderson via Phabricator via llvm-commits
- [PATCH] D154565: [InstCombine] Fold icmps comparing uadd_sat with a constant
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154573: [InstCombine] Add tests for folding `(icmp eq/ne (zext i1) (sext i1))`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154574: [InstCombine] Fold `(icmp eq/ne (zext i1 X) (sext i1 Y))`-> `(icmp eq/ne (or X, Y), 0)`
Noah Goldstein via Phabricator via llvm-commits
- [llvm] 1e60ab0 - [JITLink][RISCV] Move relax to PostAllocationPasses
Job Noorman via llvm-commits
- [PATCH] D154501: [JITLink][RISCV] Move relax to PostAllocationPasses
Job Noorman via Phabricator via llvm-commits
- [PATCH] D149440: [yaml2obj] Add support for load config section data.
James Henderson via Phabricator via llvm-commits
- [PATCH] D154574: [InstCombine] Fold `(icmp eq/ne (zext i1 X) (sext i1 Y))`-> `(icmp eq/ne (or X, Y), 0)`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154573: [InstCombine] Add tests for folding `(icmp eq/ne (zext i1) (sext i1))`; NFC
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154078: [X86] Don't elide argument copies for scalarized vectors (PR63475)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154575: [X86] Prevent infinite loop in SelectionDAG when lowering negations
Maurice Heumann via Phabricator via llvm-commits
- [PATCH] D154504: [UTC] Fix git URL regex
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D109192: Support: introduce public API annotation support
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153800: [ARM] Adjust strd/ldrd codegen alignment requirements
Maurice Heumann via Phabricator via llvm-commits
- [PATCH] D154501: [JITLink][RISCV] Move relax to PostAllocationPasses
Job Noorman via Phabricator via llvm-commits
- [PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)
Brandon Wu via Phabricator via llvm-commits
- [PATCH] D154572: [RISCV] Use 'long' in aes64 Zknd/Zkne builtin tests. NFC
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D107087: Fix SectionMemoryManager deconstruction error with MSVC
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)
Craig Topper via Phabricator via llvm-commits
- [PATCH] D139092: [LLD][ELF] Cortex-M Security Extensions (CMSE) Support
Amilendra Kodithuwakku via Phabricator via llvm-commits
- [PATCH] D154572: [RISCV] Use 'long' in aes64 Zknd/Zkne builtin tests. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)
Brandon Wu via Phabricator via llvm-commits
- [PATCH] D153800: [ARM] Adjust strd/ldrd codegen alignment requirements
David Spickett via Phabricator via llvm-commits
- [PATCH] D153632: [AArch64] Extra tablegen patterns for smaller extracted addl/addw/subl/subw
Dave Green via Phabricator via llvm-commits
- [PATCH] D154314: [LV] Remove the reminder loop if we know the mask is always true
David Sherwood via Phabricator via llvm-commits
- [PATCH] D154579: [InstCombine] Only perform one iteration
Nikita Popov via Phabricator via llvm-commits
- [llvm] 38a7ef7 - [docs] Remove incorrect markup in a code block
Dmitri Gribenko via llvm-commits
- [PATCH] D154545: [llvm-rc] Allow detection by Meson
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- [PATCH] D151021: [llvm-exegesis] Introduce Subprocess Executor Mode
Hafiz Abid Qadeer via Phabricator via llvm-commits
- [PATCH] D154314: [LV] Remove the reminder loop if we know the mask is always true
Allen zhong via Phabricator via llvm-commits
- [PATCH] D147108: [InstCombine] Add transforms for `(rem (shl Y, X), (shl Z, X))`
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D153842: [PowerPC] Update input operands information of Power10 scheduling model
Qiu Chaofan via Phabricator via llvm-commits
- [PATCH] D154579: [InstCombine] Only perform one iteration
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154533: [DAG] Improve carry reconstruction in combineCarryDiamond.
Ulrich Weigand via Phabricator via llvm-commits
- [PATCH] D154314: [LV] Remove the reminder loop if we know the mask is always true
Allen zhong via Phabricator via llvm-commits
- [PATCH] D154508: [TLI][AArch64] Add mappings to vectorized functions from ArmPL
mgabka via Phabricator via llvm-commits
- [PATCH] D154584: Improve collectEphemeralValues and use it in CodeGenPrepare
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D152358: [CGP] Remove operand of llvm.assume more aggressively.
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D151022: [llvm-exegesis] Introduce SubprocessMemory Utility Class
David Stuttard via Phabricator via llvm-commits
- [PATCH] D154078: [X86] Don't elide argument copies for scalarized vectors (PR63475)
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D154411: [RISCV][NFC] Simplify lowerVPOp.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
Ben Shi via Phabricator via llvm-commits
- [llvm] 819d070 - [X86] Add base SSE2 i686 test coverage to vector bool reduction tests
Simon Pilgrim via llvm-commits
- [llvm] bb65e5b - [X86] Add base SSE2 i686 test coverage to vector bitlogic reduction tests
Simon Pilgrim via llvm-commits
- [llvm] 3f7470c - [X86] Fold BITOP(PACKSS(X,Z),PACKSS(Y,W)) --> PACKSS(BITOP(X,Y),BITOP(Z,W)) (REAPPLIED)
Simon Pilgrim via llvm-commits
- [PATCH] D154589: MIPS: setMaxAtomicSizeInBitsSupported to 0 for MIPS I
YunQiang Su via Phabricator via llvm-commits
- [PATCH] D154589: MIPS: setMaxAtomicSizeInBitsSupported to 0 for MIPS I
YunQiang Su via Phabricator via llvm-commits
- [PATCH] D139092: [LLD][ELF] Cortex-M Security Extensions (CMSE) Support
Amilendra Kodithuwakku via Phabricator via llvm-commits
- [PATCH] D154508: [TLI][AArch64] Add mappings to vectorized functions from ArmPL
Paul Walker via Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Jay Foad via Phabricator via llvm-commits
- [llvm] 7aafea0 - [llvm][Support] Deprecate llvm::writeFileAtomically API
Haojian Wu via llvm-commits
- [PATCH] D153740: [llvm][Support] Deprecate llvm::writeFileAtomically API
Haojian Wu via Phabricator via llvm-commits
- [PATCH] D154591: [OpenMP][OMPIRBuilder] Rename IsEmbedded and IsTargetCodegen flags
Sergio Afonso via Phabricator via llvm-commits
- [PATCH] D153771: [BOLT][Instrumentation] Fix hash table memory corruption and append-pid option
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D154592: [X86] LowerTRUNCATE - improve handling during type legalization to PACKSS/PACKUS patterns
Simon Pilgrim via Phabricator via llvm-commits
- [lld] 9acbab6 - [LLD][ELF] Cortex-M Security Extensions (CMSE) Support
Amilendra Kodithuwakku via llvm-commits
- [PATCH] D139092: [LLD][ELF] Cortex-M Security Extensions (CMSE) Support
Amilendra Kodithuwakku via Phabricator via llvm-commits
- [compiler-rt] 65bc9c3 - [compiler-rt] Fix __sanitizer_cpuset size on newer FreeBSD
Marco Elver via llvm-commits
- [PATCH] D154517: AMDGPU: Always use v_rcp_f16 and v_rsq_f16
Jay Foad via Phabricator via llvm-commits
- [llvm] b4049b4 - [AMDGPU] Add GlobalISel test coverage for floating-point truncations.
Ivan Kosarev via llvm-commits
- [PATCH] D154527: [AMDGPU] Add GlobalISel test coverage for floating-point truncations.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D154575: [X86] Prevent infinite loop in SelectionDAG when lowering negations
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] 948375f - update_mir_test_checks.py - separate different prefix checks
Simon Pilgrim via llvm-commits
- [PATCH] D152333: update_mir_test_checks.py doesn't separate different prefix checks #63112
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D154593: [IRCE][Tests] Add more tests with range checks in the form of 'iv + offset vs limit'
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D154594: Add version comparison in BooleanExpression for lit testing
David Stuttard via Phabricator via llvm-commits
- [PATCH] D153757: [RFC][TableGen][GlobalISel] Add Combiner Match Table Backend
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D154575: [X86] Prevent infinite loop in SelectionDAG when lowering negations
Maurice Heumann via Phabricator via llvm-commits
- [PATCH] D143762: [AMDGPU] Enable whole wave register copy
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D149440: [yaml2obj] Add support for load config section data.
Jacek Caban via Phabricator via llvm-commits
- [PATCH] D149440: [yaml2obj] Add support for load config section data.
Jacek Caban via Phabricator via llvm-commits
- [PATCH] D154508: [TLI][AArch64] Add mappings to vectorized functions from ArmPL
mgabka via Phabricator via llvm-commits
- [PATCH] D154575: [X86] Prevent infinite loop in SelectionDAG when lowering negations
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D154567: [RISCV] Use ClangBuiltin in IntrinsicsRISCV.td to map some scalar crypto builtins to IR intrinsic.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D154598: [CodeGen] Fix incorrectly detected reduction bug in ComplexDeinterleaving pass
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D154599: [lld] respect LLVM_EXTERNAL_LIT
Konrad Wilhelm Kleine via Phabricator via llvm-commits
- [PATCH] D154575: [X86] Prevent infinite loop in SelectionDAG when lowering negations
Maurice Heumann via Phabricator via llvm-commits
- [PATCH] D153355: [CodeGen] Add support for Splats in ComplexDeinterleaving pass
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D152827: [AArch64] Correctly determine if {ADD,SUB}{W,X}rs instructions are cheap
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D154545: [llvm-rc] Improve help printouts
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D154598: [CodeGen] Fix incorrectly detected reduction bug in ComplexDeinterleaving pass
mgabka via Phabricator via llvm-commits
- [PATCH] D154601: Register new assumption in a cache
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D154584: Improve collectEphemeralValues and use it in CodeGenPrepare
Serguei Katkov via Phabricator via llvm-commits
- [llvm] a0fcf84 - [LV] Consider if scalar epilogue is required in getMaximizedVFForTarget.
Florian Hahn via llvm-commits
- [PATCH] D154261: [LV] Consider if scalar epilogue is required in getMaximizedVFForTarget.
Florian Hahn via Phabricator via llvm-commits
- [llvm] 619c6c0 - [RISCV][test] Add RV32I and RV64I RUN lines to llvm.frexp.ll
Alex Bradbury via llvm-commits
- [PATCH] D154533: [DAG] Improve carry reconstruction in combineCarryDiamond.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D154261: [LV] Consider if scalar epilogue is required in getMaximizedVFForTarget.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154601: Register new assumption in a cache
Nikita Popov via Phabricator via llvm-commits
- [llvm] 2de812f - [LangRef] Always allow getelementptr inbounds with zero offset
Nikita Popov via llvm-commits
- [PATCH] D154051: [LangRef] Always allow getelementptr inbounds with zero offset
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D152554: [OpenMP] Migrate device code privatisation from Clang CodeGen to OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D154602: [clang][clangd] Don't crash/assert on -gsplit-dwarf=single without output
Dmitry Polukhin via Phabricator via llvm-commits
- [llvm] 598ccce - [AIX][TLS] Generate optimized local-exec access code sequence using X-Form loads/stores
Amy Kwan via llvm-commits
- [PATCH] D150367: [AIX][TLS] Generate optimized local-exec access code sequence using X-Form loads/stores
Amy Kwan via Phabricator via llvm-commits
- [llvm] 6c7fd72 - [InstSimplify] Fold gep inbounds undef to undef instead of poison
Nikita Popov via llvm-commits
- [PATCH] D154215: [InstSimplify] Fold gep inbounds undef to undef instead of poison
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D135849: [llvm] Return canonical virtual path from `RedirectingFileSystem`
Jan Svoboda via Phabricator via llvm-commits
- [llvm] c63be92 - [GlobalISel][X86] Regenerate add/sub legalization tests
Simon Pilgrim via llvm-commits
- [llvm] 99b3b8e - [DemandedBits] Print function name when printing analysis.
Florian Hahn via llvm-commits
- [PATCH] D135849: [llvm][vfs] For virtual directories, use the virtual path as real path
Jan Svoboda via Phabricator via llvm-commits
- [llvm] 09feee5 - [BPF] Undo transformation for LICM.cpp:hoistMinMax()
Eduard Zingerman via llvm-commits
- [PATCH] D147990: [BPF] Undo transformation for LICM.cpp:hoistMinMax()
Eduard Zingerman via Phabricator via llvm-commits
- [llvm] ec11216 - [IRCE][Tests] Add more tests with range checks in the form of 'iv + offset vs limit'
Aleksandr Popov via llvm-commits
- [PATCH] D154593: [IRCE][Tests] Add more tests with range checks in the form of 'iv + offset vs limit'
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D154604: [BOLT] Calculate output values using BOLTLinker
Job Noorman via Phabricator via llvm-commits
- [llvm] d625439 - [DemandedBits] Add tests for shl.
Florian Hahn via llvm-commits
- [PATCH] D154579: [InstCombine] Only perform one iteration
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D154599: [lld] respect LLVM_EXTERNAL_LIT
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D153788: [SystemZ][z/OS] z/OS ADA codegen and emission
Ulrich Weigand via Phabricator via llvm-commits
- [PATCH] D154606: [PowerPC] Add DFP test instruction definitions and MC tests
Kamau Bridgeman via Phabricator via llvm-commits
- [llvm] 8900ada - [gn] port 3003da71540b
Nico Weber via llvm-commits
- [llvm] 195b288 - [gn build] Port 163aad6bcbff
LLVM GN Syncbot via llvm-commits
- [llvm] 92f571d - [gn build] Port 2d8cd1951202
LLVM GN Syncbot via llvm-commits
- [llvm] c9fa41d - [gn build] Port 4ade8b7ed997
LLVM GN Syncbot via llvm-commits
- [llvm] 34de494 - [gn build] Port 7aafea001282
LLVM GN Syncbot via llvm-commits
- [PATCH] D154609: [X86] Preserve volatile ATOMIC_LOAD_OR nodes
Nabeel Omer via Phabricator via llvm-commits
- [PATCH] D154609: [X86] Preserve volatile ATOMIC_LOAD_OR nodes
Nabeel Omer via Phabricator via llvm-commits
- [PATCH] D154609: [X86] Preserve volatile ATOMIC_LOAD_OR nodes
Nabeel Omer via Phabricator via llvm-commits
- [PATCH] D153788: [SystemZ][z/OS] z/OS ADA codegen and emission
Yusra Syeda via Phabricator via llvm-commits
- [llvm] 6b28930 - [LV] Add test case for incorrect shift truncation.
Florian Hahn via llvm-commits
- [PATCH] D154078: [X86] Don't elide argument copies for scalarized vectors (PR63475)
Nikita Popov via Phabricator via llvm-commits
- [llvm] 90b83a6 - [SVE] Add isel for 32-bit add/sub(cntp()) -> incp/decp.
Paul Walker via llvm-commits
- [llvm] 8ee1cc8 - AMDGPU: Fold out sign bit ops on frexp_exp
Matt Arsenault via llvm-commits
- [llvm] c70cae6 - AMDGPU: Make SIFixVGPRCopies preserve everything
Matt Arsenault via llvm-commits
- [PATCH] D154350: [SVE] Add isel for 32-bit add/sub(cntp()) -> incp/decp.
Paul Walker via Phabricator via llvm-commits
- [PATCH] D154537: AMDGPU: Fold out sign bit ops on frexp_exp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154554: AMDGPU: Make SIFixVGPRCopies preserve everything
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154579: [InstCombine] Only perform one iteration
Nikita Popov via Phabricator via llvm-commits
- [lld] 58fb2c7 - [lld] respect LLVM_EXTERNAL_LIT
Konrad Kleine via llvm-commits
- [PATCH] D154599: [lld] respect LLVM_EXTERNAL_LIT
Konrad Wilhelm Kleine via Phabricator via llvm-commits
- [PATCH] D152094: DAG: Check isCondCodeLegal in is_fpclass expansion to fcmp eq 0
Matt Arsenault via Phabricator via llvm-commits
- [llvm] ab49d30 - [Mips] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via llvm-commits
- [PATCH] D154319: [Mips] Replace OperandMatchResultTy with ParseStatus (NFC)
Sergei Barannikov via Phabricator via llvm-commits
- [llvm] a69ffd6 - [X86] isTargetShuffleEquivalent - ensure the reference operands are vector types
Simon Pilgrim via llvm-commits
- [PATCH] D154493: [X86] Support some Intel CPUs for cpu_specific/dispatch feature
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] f3d0613 - [CaptureTracking] Don't consider comparison of inbounds GEP with nonnull non-capturing
Nikita Popov via llvm-commits
- [PATCH] D154054: [CaptureTracking] Don't consider comparison of inbounds GEP with nonnull non-capturing
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151613: Do not set CMAKE_CXX_FLAGS_<config> with FORCE
Artemy via Phabricator via llvm-commits
- [PATCH] D152714: [AArch64][Optimization]Solving the FCCMP issue
Sam Tebbs via Phabricator via llvm-commits
- [PATCH] D147544: [BOLT] Move from RuntimeDyld to JITLink
Job Noorman via Phabricator via llvm-commits
- [llvm] 1db5b49 - [RISCV] Use ClangBuiltin in IntrinsicsRISCV.td to map some scalar crypto builtins to IR intrinsic.
Craig Topper via llvm-commits
- [PATCH] D154567: [RISCV] Use ClangBuiltin in IntrinsicsRISCV.td to map some scalar crypto builtins to IR intrinsic.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D41766: [MachineCombiner] Add check for optimal pattern order.
Madhur Amilkanthwar via Phabricator via llvm-commits
- [PATCH] D150671: RISCV/InstrInfo: model register pressure for MICombiner
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D153788: [SystemZ][z/OS] z/OS ADA codegen and emission
Ulrich Weigand via Phabricator via llvm-commits
- [PATCH] D150696: [LV] Vectorization remark for outerloop
Kolya Panchenko via Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D154616: [RISCV] Use unsigned instead of signed types for Zk* and Zb* builtins.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154069: [IRCE] Parse range checks in the form of "LHS - RHS vs Limit"
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D154069: [IRCE] Parse range checks in the form of "LHS - RHS vs Limit"
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D154598: [CodeGen] Fix incorrectly detected reduction bug in ComplexDeinterleaving pass
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D143762: [AMDGPU] Enable whole wave register copy
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D150671: RISCV/InstrInfo: model register pressure for MICombiner
Craig Topper via Phabricator via llvm-commits
- [PATCH] D146121: [DAG] Move lshr narrowing from visitANDLike to SimplifyDemandedBits (WIP)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D146121: [DAG] Move lshr narrowing from visitANDLike to SimplifyDemandedBits (WIP)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D150671: RISCV/InstrInfo: model register pressure for MICombiner
Craig Topper via Phabricator via llvm-commits
- [PATCH] D143762: [AMDGPU] Enable whole wave register copy
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Christudasan Devadasan via Phabricator via llvm-commits
- [llvm] d6d7f7b - [AIX][XCOFF] print out the traceback info
via llvm-commits
- [PATCH] D89049: [AIX][XCOFF] print out the traceback info
Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154383: [UTC] Add do-not-autogenerate capability
Paul Robinson via Phabricator via llvm-commits
- [PATCH] D154384: [InstCombine] added icmp or xor tests
Maksim Kita via Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D149773: [AMDGPU][IGLP] Add iglp_opt(1) strategy for single wave gemms
Jeffrey Byrnes via Phabricator via llvm-commits
- [llvm] c2964a5 - [SystemZ][z/OS] Address single comment in ADA patch for EmittedBytes unused in -Asserts
Yusra Syeda via llvm-commits
- [PATCH] D154620: [RISCV] Cleanup dead complexity in RISCVMaskedPseudo after TA/TU merge refactoring [nfc]
Philip Reames via Phabricator via llvm-commits
- [llvm] 9df70e4 - AMDGPU: Fix not applying the correct default memcpy expansion threshold
Matt Arsenault via llvm-commits
- [compiler-rt] 015dabd - Reland '[msan] Intercept dladdr1, and refactor dladdr'
Thurston Dang via llvm-commits
- [PATCH] D154306: [InstCombine] Generalise ((x1 ^ y1) | (x2 ^ y2)) == 0 transform to more than two pairs of variables
Maksim Kita via Phabricator via llvm-commits
- [PATCH] D154306: [InstCombine] Generalise ((x1 ^ y1) | (x2 ^ y2)) == 0 transform to more than two pairs of variables
Maksim Kita via Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D154622: [AArch64] Fix cost modelling for SVE Min/Max Intrinsics
Tuan Chuong Goh via Phabricator via llvm-commits
- [PATCH] D143967: [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF
Eduard Zingerman via Phabricator via llvm-commits
- [PATCH] D149058: [BPF][DebugInfo] Use .BPF.ext for line info when DWARF is not available
Eduard Zingerman via Phabricator via llvm-commits
- [PATCH] D154591: [OpenMP][OMPIRBuilder] Rename IsEmbedded and IsTargetCodegen flags
Sergio Afonso via Phabricator via llvm-commits
- [PATCH] D152094: DAG: Check isCondCodeLegal in is_fpclass expansion to fcmp eq 0
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D154571: [emacs] Highlight 'zeroext' and 'signext' keyword as an attribute
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154571: [emacs] Highlight 'zeroext' and 'signext' keyword as an attribute
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154383: [UTC] Add do-not-autogenerate capability
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D154591: [OpenMP][OMPIRBuilder] Rename IsEmbedded and IsTargetCodegen flags
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D154625: [DemandedBits] Improve analysis of second shl operand.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154602: [clang][clangd] Don't crash/assert on -gsplit-dwarf=single without output
Dmitry Polukhin via Phabricator via llvm-commits
- [llvm] 1588e18 - DAG: Check isCondCodeLegal in is_fpclass expansion to fcmp eq 0
Matt Arsenault via llvm-commits
- [PATCH] D152094: DAG: Check isCondCodeLegal in is_fpclass expansion to fcmp eq 0
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 5e763d3 - [gn] Add check-lsan target for Mac
Leonard Grey via llvm-commits
- [PATCH] D153651: [gn] Add check-lsan target for Mac
Leonard Grey via Phabricator via llvm-commits
- [llvm] 61820f8 - CodeGen: Optimize lowering of is.fpclass fcZero|fcSubnormal
Matt Arsenault via llvm-commits
- [PATCH] D143182: CodeGen: Optimize lowering of is.fpclass fcZero|fcSubnormal
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154565: [InstCombine] Fold icmps comparing uadd_sat with a constant
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D154565: [InstCombine] Fold icmps comparing uadd_sat with a constant
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D154571: [emacs] Highlight 'zeroext' and 'signext' keyword as an attribute
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153502: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154565: [InstCombine] Fold icmps comparing uadd_sat with a constant
Dhruv Chawla via Phabricator via llvm-commits
- [llvm] c2aa061 - [YAML][NFC] Replace if-else with switch in createHNodes
Amir Ayupov via llvm-commits
- [PATCH] D154553: [YAML][NFC] Replace if-else with switch in createHNodes
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D154022: [BOLT][NFCI] Migrate pseudo probes to MetadataRewriter interface
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D154023: [BOLT][NFCI] Move ProbeDecoder to PseudoProbeRewriter
Amir Ayupov via Phabricator via llvm-commits
- [llvm] 4b36b2c - [Support] Use C++11 attribute syntax for visibility attributes
Tom Stellard via llvm-commits
- [PATCH] D152043: [Support] Use C++11 attribute syntax for visibility attributes
Tom Stellard via Phabricator via llvm-commits
- [lld] b7d36a1 - [ELF] Use compression::getReasonIfUnsupported for zlib/zstd unavailable error
Fangrui Song via llvm-commits
- [compiler-rt] 531f90a - [scudo] Verify the size of free blocks in primary allocator
Chia-hung Duan via llvm-commits
- [compiler-rt] bce8c9e - [scudo] Try to release pages after unlocking the TSDs
Chia-hung Duan via llvm-commits
- [PATCH] D154591: [OpenMP][OMPIRBuilder] Rename IsEmbedded and IsTargetCodegen flags
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D154571: [emacs] Highlight 'zeroext' and 'signext' keyword as an attribute
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154579: [InstCombine] Only perform one iteration
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D154536: [RISCV] Check for alignment when lowering interleaved/deinterleaved loads/stores
Philip Reames via Phabricator via llvm-commits
- [PATCH] D154535: [RISCV] Add tests for unaligned segmented loads and stores
Philip Reames via Phabricator via llvm-commits
- [PATCH] D154622: [AArch64] Fix cost modelling for SVE Min/Max Intrinsics
Dave Green via Phabricator via llvm-commits
- [PATCH] D154628: [RISCV] Add rounding mode control variant for vfsub, vfrsub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [llvm] c2bed2a - [UTC] Add do-not-autogenerate capability
Paul Robinson via llvm-commits
- [PATCH] D154383: [UTC] Add do-not-autogenerate capability
Paul Robinson via Phabricator via llvm-commits
- [PATCH] D154536: [RISCV] Check for alignment when lowering interleaved/deinterleaved loads/stores
Philip Reames via Phabricator via llvm-commits
- [PATCH] D154629: [RISCV] Add rounding mode control variant for vfwadd, vfwsub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154630: [LLVM-C] Use unwrapDI in LLVMDITypeGetName
Tamir Duberstein via Phabricator via llvm-commits
- [PATCH] D154631: [RISCV] Add rounding mode control variant for vfmul, vfdiv, vfrdiv, vfwmul
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154632: [RISCV] Add rounding mode control variant for vfmacc, vfnmacc, vfmsac, vfnmsac, vfmadd, vfnmadd, vfmsub, vfnmsub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154119: Fix: Distinguish CFI Metadata Checks in MergeFunctions Pass
Oskar Wirga via Phabricator via llvm-commits
- [PATCH] D154579: [InstCombine] Only perform one iteration
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154633: [RISCV] Add rounding mode control variant for vfwmacc, vfwnmacc, vfwmsac, vfwnmsac
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154634: [RISCV] Add rounding mode control variant for vfsqrt, vfrec7
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154635: [RISCV] Add rounding mode control variant for conversion intrinsics between floating-point and integer
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154565: [InstCombine] Fold icmps comparing uadd_sat with a constant
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154636: [RISCV] Add rounding mode control variant for vfredosum, vfredusum, vfwredosum, vfwredusum
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [compiler-rt] 1da10d2 - [msan] Fix -Wcast-qual error in msan_dl.cpp
Thurston Dang via llvm-commits
- [PATCH] D153351: [RISCV] Fold vmv.v.v into vops
Philip Reames via Phabricator via llvm-commits
- [llvm] c1e2838 - [gn build] Manually port 015dabd7
Arthur Eubanks via llvm-commits
- [PATCH] D154637: [CSSPGO] Fix ICE that callee samples returns null while finding import functions
Lei Wang via Phabricator via llvm-commits
- [PATCH] D154023: [BOLT][NFCI] Move ProbeDecoder to PseudoProbeRewriter
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D154306: [InstCombine] Generalise ((x1 ^ y1) | (x2 ^ y2)) == 0 transform to more than two pairs of variables
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154630: [LLVM-C] Use unwrapDI in LLVMDITypeGetName
Tamir Duberstein via Phabricator via llvm-commits
- [PATCH] D154020: [BOLT] Introduce MetadataRewriter interface
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D154021: [BOLT][NFCI] Use MetadataRewriter interface to update SDT markers
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D154638: Emit a .debug_addr section with dsymutil
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D154630: [LLVM-C] Use unwrapDI in LLVMDITypeGetName
Tamir Duberstein via Phabricator via llvm-commits
- [PATCH] D154022: [BOLT][NFCI] Migrate pseudo probes to MetadataRewriter interface
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D154023: [BOLT][NFCI] Move ProbeDecoder to PseudoProbeRewriter
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D154024: [BOLT][NFCI] Migrate Linux Kernel handling code to MetadataRewriter
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D154024: [BOLT][NFCI] Migrate Linux Kernel handling code to MetadataRewriter
Maksim Panchenko via Phabricator via llvm-commits
- [llvm] de8ad9f - [gn build] Port 38639a8159b2
LLVM GN Syncbot via llvm-commits
- [llvm] df40f96 - [gn build] Port 43dce27c06e4
LLVM GN Syncbot via llvm-commits
- [llvm] d8f1436 - [gn build] Port 98e2d630277e
LLVM GN Syncbot via llvm-commits
- [llvm] ade8db5 - [gn build] Port c9b1f062887d
LLVM GN Syncbot via llvm-commits
- [llvm] 66e943b - [BOLT][DWARF] Fix for .debug_line with DWARF5
Alexander Yermolovich via llvm-commits
- [PATCH] D154544: [BOLT][DWARF] Fix for .debug_line with DWARF5
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D149773: [AMDGPU][IGLP] Add iglp_opt(1) strategy for single wave gemms
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D151906: [BOLT][DWARF] Numerous fixes for a new DWARFRewriter
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D154639: [WebAssembly] Add frexp{f,l} libcall signatures
Derek Schuff via Phabricator via llvm-commits
- [PATCH] D154526: [llvm-mca][RISCV] vsetivli and vsetvli act as instruments
Andrea Di Biagio via Phabricator via llvm-commits
- [PATCH] D154625: [DemandedBits] Improve analysis of second shl operand.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154639: [WebAssembly] Add frexp{f,l} libcall signatures
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D154306: [InstCombine] Generalise ((x1 ^ y1) | (x2 ^ y2)) == 0 transform to more than two pairs of variables
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153600: Implement -frecord-command-line for XCOFF
Scott Linder via Phabricator via llvm-commits
- [PATCH] D154630: [LLVM-C] Use unwrapDI in LLVMDITypeGetName
Tamir Duberstein via Phabricator via llvm-commits
- [PATCH] D151908: [BOLT][DWARF] Output DWO files as they are being processed
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D154628: [1/8][RISCV] Add rounding mode control variant for vfsub, vfrsub
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151909: [BOLT][DWARF] Change to process and write out TUs first then CUs in batches
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D152959: [BOLT] Fix sorting functions by execution count
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D154629: [2/8][RISCV] Add rounding mode control variant for vfwadd, vfwsub
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Thorsten via Phabricator via llvm-commits
- [PATCH] D154640: [LV] Move all VPlan transforms after initial VPlan construction (NFC).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154641: [ELF] Add --compress-ections
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154635: [7/8][RISCV] Add rounding mode control variant for conversion intrinsics between floating-point and integer
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154642: [NFC][llvm-dwp] Switch from llvm::cl to OptTable
Andres Villegas via Phabricator via llvm-commits
- [PATCH] D152726: [RISCV][GlobalISel] Legalize all ALU instructions, excluding w-instructions
Thorsten via Phabricator via llvm-commits
- [PATCH] D147732: [AMDGPU] Add type mangling for {read, write, readfirst, perm}lane intrinsics
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154644: [LV] Split off code to create initial VPlan (NFC).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152833: A new code layout algorithm for function reordering [1/3]
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D154598: [CodeGen] Fix incorrectly detected reduction bug in ComplexDeinterleaving pass
Mike Hommey via Phabricator via llvm-commits
- [PATCH] D154645: [RISCV] Remove legacy TA/TU pseudo distinction of vmerge and carry-in arithmetic operations [NFC[
Philip Reames via Phabricator via llvm-commits
- [llvm] d0bb76f - [emacs] Highlight 'zeroext' and 'signext' keywords as an attribute
Noah Goldstein via llvm-commits
- [llvm] 2cb6b06 - [InstCombine] Add constant combines for `(urem/srem (shl X, Y), (shl X, Z))`
Noah Goldstein via llvm-commits
- [llvm] 19fc5e8 - [InstCombine] Add test cases for `(rem (shl Y, X), (shl Z, X))`; NFC
Noah Goldstein via llvm-commits
- [llvm] 453d983 - [InstCombine] Add transforms for `(rem (shl Y, X), (shl Z, X))`
Noah Goldstein via llvm-commits
- [PATCH] D154571: [emacs] Highlight 'zeroext' and 'signext' keyword as an attribute
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144225: [InstCombine] Add constant combines for `(urem/srem (shl X, Y), (shl X, Z))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D147107: [InstCombine] Add test cases for `(rem (shl Y, X), (shl Z, X))`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D147108: [InstCombine] Add transforms for `(rem (shl Y, X), (shl Z, X))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154639: [WebAssembly] Add frexp{f,l} libcall signatures
Derek Schuff via Phabricator via llvm-commits
- [PATCH] D154647: [RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154637: [CSSPGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D154639: [WebAssembly] Add frexp{f,l} libcall signatures
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D154639: [WebAssembly] Add frexp{f,l} libcall signatures
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D154639: [WebAssembly] Add frexp{f,l} libcall signatures
Derek Schuff via Phabricator via llvm-commits
- [PATCH] D154653: [RISCV] Remove pseudos for vwcvt.f.x(u) with rounding mode.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153771: [BOLT][Instrumentation] Fix hash table memory corruption and append-pid option
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D154639: [WebAssembly] Add frexp{f,l} libcall signatures
Derek Schuff via Phabricator via llvm-commits
- [PATCH] D154635: [7/8][RISCV] Add rounding mode control variant for conversion intrinsics between floating-point and integer
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154639: [WebAssembly] Add frexp{f,l} libcall signatures
Derek Schuff via Phabricator via llvm-commits
- [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154654: [BOLT] Fix buildbot failure
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)
Florian Hahn via Phabricator via llvm-commits
- [llvm] ad14659 - [WebAssembly] Add frexp{f,l} libcall signatures
Derek Schuff via llvm-commits
- [PATCH] D154639: [WebAssembly] Add frexp{f,l} libcall signatures
Derek Schuff via Phabricator via llvm-commits
- [PATCH] D153757: [RFC][TableGen][GlobalISel] Add Combiner Match Table Backend
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D153756: [TableGen][GlobalISel] Add Generic MatchTableExecutor Emitter
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D154655: [DebugInfo] Force users of DWARFDebugAbbrev to call parse before iterating
Alex Langford via Phabricator via llvm-commits
- [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154654: [BOLT] Fix buildbot failure
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D153850: [AArch64] Use GlobalISel MatchTable Combiner Backend
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D145265: [Pipeline] Remove GlobalCleanupPM
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D145265: [Pipeline] Remove GlobalCleanupPM
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D154638: Emit a .debug_addr section with dsymutil
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D149367: Emit the CodeView `S_ARMSWITCHTABLE` debug symbol for jump tables
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D149773: [AMDGPU][IGLP] Add iglp_opt(1) strategy for single wave gemms
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D149773: [AMDGPU][IGLP] Add iglp_opt(1) strategy for single wave gemms
Jeffrey Byrnes via Phabricator via llvm-commits
- [llvm] 72e7e58 - [MemorySSA] Always perform MemoryUses liveOnEntry optimization on MSSA construction
Arthur Eubanks via llvm-commits
- [llvm] 70503ae - [DSE] Don't eagerly optimize MemorySSA uses
Arthur Eubanks via llvm-commits
- [PATCH] D152859: [MemorySSA] Always perform MemoryUses liveOnEntry optimization on MSSA construction
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D152744: [DSE] Don't eagerly optimize MemorySSA uses
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D99750: [LV, VP] RFC: VP intrinsics support for the Loop Vectorizer (Proof-of-Concept)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154173: [LAA] Add test that shows MaxSafeDepDistBytes is incorrect. NFC.
Florian Hahn via Phabricator via llvm-commits
- [llvm] 986001c - [AMDGPU] Improve assembler + disassembler handling of kernel descriptors
Scott Linder via llvm-commits
- [PATCH] D128014: [AMDGPU] Improve assembler + disassembler handling of kernel descriptors
Scott Linder via Phabricator via llvm-commits
- [llvm] 460a224 - [DWARF][BOLT] Implement new mechanism for DWARFRewriter
Alexander Yermolovich via llvm-commits
- [PATCH] D147732: [AMDGPU] Add type mangling for {read, write, readfirst, perm}lane intrinsics
Jeffrey Byrnes via Phabricator via llvm-commits
- [PATCH] D154543: [llvm] Move StringExtras.h include from Error.h to Error.cpp
Elliot Goodrich via Phabricator via llvm-commits
- [llvm] aef6d46 - [LAA] Add test that shows MaxSafeDepDistBytes is incorrect. NFC.
Michael Maitland via llvm-commits
- [PATCH] D154173: [LAA] Add test that shows MaxSafeDepDistBytes is incorrect. NFC.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D154517: AMDGPU: Always use v_rcp_f16 and v_rsq_f16
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153229: [llvm] Move StringExtras.h include from Error.h to Error.cpp
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153229: [llvm] Move StringExtras.h include from Error.h to Error.cpp
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154638: Emit a .debug_addr section with dsymutil
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D153479: [NFC] Tests for future commit in DAGCombiner
Konstantina Mitropoulou via Phabricator via llvm-commits
- [PATCH] D99750: [LV, VP] RFC: VP intrinsics support for the Loop Vectorizer (Proof-of-Concept)
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D153479: [NFC] Tests for future commit in DAGCombiner
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation
Paul Osmialowski via Phabricator via llvm-commits
- [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation
Paul Osmialowski via Phabricator via llvm-commits
- [PATCH] D154526: [llvm-mca][RISCV] vsetivli and vsetvli act as instruments
Min-Yih Hsu via Phabricator via llvm-commits
- [PATCH] D154602: [clang][clangd] Don't crash/assert on -gsplit-dwarf=single without output
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D154445: [Mips] Fix argument lowering for illegal vector types (PR63608)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154136: [RISCV] Add SEW to RISCVInversePseudoTable
Min-Yih Hsu via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Lei Wang via Phabricator via llvm-commits
- [PATCH] D154490: [libunwind] Add missing alloca.h include
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D154630: [LLVM-C] Use unwrapDI in LLVMDITypeGetName
Scott Linder via Phabricator via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpaceInfo to deduce address spaces
Johannes Doerfert via Phabricator via llvm-commits
- [llvm] ecf372f - [llvm-mca][RISCV] vsetivli and vsetvli act as instruments
Michael Maitland via llvm-commits
- [PATCH] D154526: [llvm-mca][RISCV] vsetivli and vsetvli act as instruments
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D153479: [NFC] Tests for future commit in DAGCombiner
Konstantina Mitropoulou via Phabricator via llvm-commits
- [PATCH] D153479: [NFC] Tests for future commit in DAGCombiner
Konstantina Mitropoulou via Phabricator via llvm-commits
- [PATCH] D153544: [AMDGPU] Use V_FMA_MIX* more often
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154630: [LLVM-C] Use unwrapDI in LLVMDITypeGetName
Tamir Duberstein via Phabricator via llvm-commits
- [PATCH] D149367: Emit the CodeView `S_ARMSWITCHTABLE` debug symbol for jump tables
Daniel Paoliello via Phabricator via llvm-commits
- [PATCH] D149367: Emit the CodeView `S_ARMSWITCHTABLE` debug symbol for jump tables
Daniel Paoliello via Phabricator via llvm-commits
- [PATCH] D154661: Appease clang-tidy
Tamir Duberstein via Phabricator via llvm-commits
- [PATCH] D154630: [LLVM-C] Use unwrapDI in LLVMDITypeGetName
Tamir Duberstein via Phabricator via llvm-commits
- [PATCH] D154630: [LLVM-C] Use unwrapDI in LLVMDITypeGetName
Tamir Duberstein via Phabricator via llvm-commits
- [PATCH] D153502: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns
Konstantina Mitropoulou via Phabricator via llvm-commits
- [PATCH] D153479: [NFC] Tests for future commit in DAGCombiner
Konstantina Mitropoulou via Phabricator via llvm-commits
- [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D153869: [DWARFv5][DWARFLinker] avoid stripping template names for .debug_names.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D154642: [NFC][llvm-dwp] Switch from llvm::cl to OptTable
Andres Villegas via Phabricator via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpaceInfo to deduce address spaces
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154661: Appease clang-tidy
Scott Linder via Phabricator via llvm-commits
- [PATCH] D154664: [NFC] Add some missing header includes
Evan Wilde via Phabricator via llvm-commits
- [PATCH] D154142: [llvm-mca][RISCV] Add RISCV-SEW instrument
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D154661: Appease clang-tidy
Tamir Duberstein via Phabricator via llvm-commits
- [PATCH] D154661: Appease clang-tidy
Scott Linder via Phabricator via llvm-commits
- [PATCH] D153502: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns
Konstantina Mitropoulou via Phabricator via llvm-commits
- [PATCH] D154664: [NFC] Add some missing header includes
Evan Wilde via Phabricator via llvm-commits
- [PATCH] D154664: [NFC] Add some missing header includes
Med Ismail Bennani via Phabricator via llvm-commits
- [PATCH] D154665: caught bug in ElfObjectFile.h
Dayann D'almeida via Phabricator via llvm-commits
- [PATCH] D154142: [llvm-mca][RISCV] Add RISCV-SEW instrument
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D154142: [llvm-mca][RISCV] Add RISCV-SEW instrument
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D99750: [LV, VP] RFC: VP intrinsics support for the Loop Vectorizer (Proof-of-Concept)
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D154641: [ELF] Add --compress-ections
Igor Kudrin via Phabricator via llvm-commits
- [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D154667: [BOLT][DWARF] Fix references in tests
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D154136: [RISCV] Add SEW to RISCVInversePseudoTable
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153376: Introducing llvm-cm: A Cost Model Tool
Dayann D'almeida via Phabricator via llvm-commits
- [PATCH] D153376: Introducing llvm-cm: A Cost Model Tool
Dayann D'almeida via Phabricator via llvm-commits
- [PATCH] D154667: [BOLT][DWARF] Fix references in tests
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D154136: [RISCV] Add SEW to RISCVInversePseudoTable
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D153376: Introducing llvm-cm: A Cost Model Tool
Dayann D'almeida via Phabricator via llvm-commits
- [PATCH] D154533: [DAG] Improve carry reconstruction in combineCarryDiamond.
Amaury SECHET via Phabricator via llvm-commits
- [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D153502: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns
Konstantina Mitropoulou via Phabricator via llvm-commits
- [PATCH] D151449: [RISCV] Add DAG combine for CTTZ/CTLZ in the case of input 0
Craig Topper via Phabricator via llvm-commits
- [compiler-rt] 667b9ad - Revert "Reland '[msan] Intercept dladdr1, and refactor dladdr'"
Thurston Dang via llvm-commits
- [PATCH] D153502: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns
Konstantina Mitropoulou via Phabricator via llvm-commits
- [llvm] be253cb - [RISCV] Support i32 brev8 intrinsic on RV64.
Craig Topper via llvm-commits
- [PATCH] D154669: [BOLT][DWARF] Don't check string offsets
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D154493: [X86] Support some Intel CPUs for cpu_specific/dispatch feature
Kan Shengchen via Phabricator via llvm-commits
- [llvm] 7436992 - Revert "[gn build] Manually port 015dabd7"
Thurston Dang via llvm-commits
- [PATCH] D154669: [BOLT][DWARF] Don't check string offsets
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D154670: [BOLT][DWARF] Don't check string offsets
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D149759: [symbolizer] Support symbol lookup
Igor Kudrin via Phabricator via llvm-commits
- [PATCH] D154670: [BOLT][DWARF] Don't check string offsets
Alexander Yermolovich via Phabricator via llvm-commits
- [llvm] 93ff211 - [ORC][AArch64] Guard against negative offsets in writeIndirectStubsBlock.
Lang Hames via llvm-commits
- [llvm] 0bf9bfe - Revert "[BPF] Undo transformation for LICM.cpp:hoistMinMax()"
Eduard Zingerman via llvm-commits
- [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map
William Junda Huang via Phabricator via llvm-commits
- [llvm] 64df957 - DAG: Handle inversion of fcSubnormal | fcZero
Matt Arsenault via llvm-commits
- [PATCH] D143191: DAG: Handle inversion of fcSubnormal | fcZero
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143502: DAG: Handle lowering of unordered fcZero|fcSubnormal to fcmp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D153686: [Support] Remove countLeadingZeros, countPopulation, etc
Hubert Tong via Phabricator via llvm-commits
- [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map
Arthur Eubanks via Phabricator via llvm-commits
- [llvm] 71cbc62 - [llvm-exegesis] Disable SubprocessMemory class on Android
Aiden Grossman via llvm-commits
- [PATCH] D151022: [llvm-exegesis] Introduce SubprocessMemory Utility Class
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D154665: caught bug in ElfObjectFile.h
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D154048: [PowerPC] disable ppc-use-absolute-jumptables for AIX
Ting Wang via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Wenlei He via Phabricator via llvm-commits
- [PATCH] D147990: [BPF] Undo transformation for LICM.cpp:hoistMinMax()
Eduard Zingerman via Phabricator via llvm-commits
- [llvm] 75b5541 - [llvm-exegesis] Switch to using PTRACE_ATTACH instead of PTRACE_SEIZE
Aiden Grossman via llvm-commits
- [llvm] 2dcba67 - [llvm-exegesis] Remove unnecessary includes
Aiden Grossman via llvm-commits
- [PATCH] D152399: [CodeGen] Fine tune MachineFunctionSplitPass (MFS) for FSAFDO.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D151021: [llvm-exegesis] Introduce Subprocess Executor Mode
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D154493: [X86] Support some Intel CPUs for cpu_specific/dispatch feature
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D154493: [X86] Support some Intel CPUs for cpu_specific/dispatch feature
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D154665: caught bug in ElfObjectFile.h
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D138883: [PowerPC] find and reuse ConstantSplatVector to combine constant store into extract and store
Ting Wang via Phabricator via llvm-commits
- [llvm] 1aa3b64 - [LoongArch] Add definition for LSX instructions
via llvm-commits
- [llvm] f3d18b9 - [LoongArch] Add definition for LASX instructions
via llvm-commits
- [llvm] 12d2acd - [LoongArch][MC] Add testcases for LSX instructions
via llvm-commits
- [llvm] 99d74ed - [LoongArch][MC] Add testcases for LASX instructions
via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpaceInfo to deduce address spaces
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D154183: [LoongArch] Add definition for LSX instructions
wanglei via Phabricator via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpaceInfo to deduce address spaces
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D154195: [LoongArch] Add definition for LASX instructions
wanglei via Phabricator via llvm-commits
- [PATCH] D154197: [LoongArch][MC] Add testcases for LSX instructions
wanglei via Phabricator via llvm-commits
- [PATCH] D154326: [LoongArch][MC] Add testcases for LASX instructions
wanglei via Phabricator via llvm-commits
- [llvm] 6269ed2 - [RISCV] Readjusting the framestack for Zcmp
via llvm-commits
- [PATCH] D134599: [RISCV] Readjusting the framestack for Zcmp
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpaceInfo to deduce address spaces
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D154677: [InstCombine] Add tests for folding `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154678: [InstCombine] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154679: [RISCV] Rename prefix `fixed-vector` to `fixed-vectors` to be the same with other testcases
Jim Lin via Phabricator via llvm-commits
- [llvm] 5919302 - [RISCV] Remove unused private field 'RVPushable' in RISCVMachineFunctionInfo.h
Jie Fu via llvm-commits
- [llvm] a403124 - [RISCV] Don't sink i1 vectors in shouldSinkOperands.
Craig Topper via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpaceInfo to deduce address spaces
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D154679: [RISCV] Rename prefix `fixed-vector` to `fixed-vectors` to be the same with other testcases
Craig Topper via Phabricator via llvm-commits
- [llvm] 1614805 - Register new assumption in a cache
Serguei Katkov via llvm-commits
- [PATCH] D154601: Register new assumption in a cache
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D154568: [Clang][OpenMP] GPU simd directive code generation
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D154568: [Clang][OpenMP] GPU simd directive code generation
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D154680: [llvm-exegesis] Make SubprocessMemoryTest use PIDs
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D154680: [llvm-exegesis] Make SubprocessMemoryTest use PIDs
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D154275: [llvm-exegesis] Support older kernel versions in subprocess executor
Aiden Grossman via Phabricator via llvm-commits
- [llvm] 3b04d11 - [Attributor][NFCI] Use AA::hasAssumedIRAttr for NoSync
Johannes Doerfert via llvm-commits
- [llvm] eed51a4 - [Attributor][NFC] Add missing comments
Johannes Doerfert via llvm-commits
- [llvm] d081296 - [Attributor] Check all NoFPClass attributes found in the IR
Johannes Doerfert via llvm-commits
- [PATCH] D154584: Improve collectEphemeralValues and use it in CodeGenPrepare
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D154493: [X86] Support some Intel CPUs for cpu_specific/dispatch feature
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D152714: [AArch64][Optimization]Solving the FCCMP issue
Priyanshi Agarwal via Phabricator via llvm-commits
- [PATCH] D154641: [ELF] Add --compress-sections
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154641: [ELF] Add --compress-sections
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154641: [ELF] Add --compress-sections
Fangrui Song via Phabricator via llvm-commits
- [llvm] 4392754 - [RISCV] Rename prefix `fixed-vector` to `fixed-vectors` to be the same with other testcases. NFC.
Jim Lin via llvm-commits
- [PATCH] D154679: [RISCV] Rename prefix `fixed-vector` to `fixed-vectors` to be the same with other testcases
Jim Lin via Phabricator via llvm-commits
- [PATCH] D150416: [RISCV] Add a pass to combine `cm.pop` and `ret` insts
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D147990: [BPF] Undo transformation for LICM.cpp:hoistMinMax()
Yonghong Song via Phabricator via llvm-commits
- [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D124196: [AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs
Yashwant Singh via Phabricator via llvm-commits
- [llvm] a10dccf - [X86] Support some Intel CPUs for cpu_specific/dispatch feature
Freddy Ye via llvm-commits
- [PATCH] D154493: [X86] Support some Intel CPUs for cpu_specific/dispatch feature
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D154628: [1/8][RISCV] Add rounding mode control variant for vfsub, vfrsub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154628: [1/8][RISCV] Add rounding mode control variant for vfsub, vfrsub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D150416: [RISCV] Add a pass to combine `cm.pop` and `ret` insts
Xinlong Wu via Phabricator via llvm-commits
- [llvm] c0221e0 - [RISCV] Add a pass to combine `cm.pop` and `ret` insts
via llvm-commits
- [PATCH] D150416: [RISCV] Add a pass to combine `cm.pop` and `ret` insts
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D151942: [BOLT] Instrumentation: AArch64 instrumentation support in runtime
Elvina Yakubova via Phabricator via llvm-commits
- [PATCH] D154629: [2/8][RISCV] Add rounding mode control variant for vfwadd, vfwsub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154686: [AIX][XCOFF] make integrated-as as default on AIX.
Brad Smith via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Lei Wang via Phabricator via llvm-commits
- [PATCH] D154558: [AArch64][SVE] Add patterns to support sve indexed FMLA/FMLS
lizhijin via Phabricator via llvm-commits
- [compiler-rt] 2b5ea51 - [compiler-rt][RISCV] Fix __fe_getround and __fe_raise_inexact for Zfinx
Kito Cheng via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Lei Wang via Phabricator via llvm-commits
- [PATCH] D154069: [IRCE] Parse range checks in the form of "LHS - RHS vs Limit"
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D154629: [2/8][RISCV] Add rounding mode control variant for vfwadd, vfwsub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154631: [3/8][RISCV] Add rounding mode control variant for vfmul, vfdiv, vfrdiv, vfwmul
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154687: [RISCV] Narrow types of index operand matched pattern (shl (zext), C).
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D154632: [4/8][RISCV] Add rounding mode control variant for vfmacc, vfnmacc, vfmsac, vfnmsac, vfmadd, vfnmadd, vfmsub, vfnmsub
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154633: [5/8][RISCV] Add rounding mode control variant for vfwmacc, vfwnmacc, vfwmsac, vfwnmsac
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154634: [6/8][RISCV] Add rounding mode control variant for vfsqrt, vfrec7
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
Ben Shi via Phabricator via llvm-commits
- [PATCH] D154686: [AIX][XCOFF] make integrated-as as default on AIX.
ChenZheng via Phabricator via llvm-commits
- [PATCH] D154665: fixed invalid symbol handling in ELFObjectFile::getSymbolName
Dayann D'almeida via Phabricator via llvm-commits
- [PATCH] D153842: [PowerPC] Update input operands information of Power10 scheduling model
ChenZheng via Phabricator via llvm-commits
- [PATCH] D154687: [RISCV] Narrow types of index operand matched pattern (shl (zext), C).
Craig Topper via Phabricator via llvm-commits
- [PATCH] D153376: Introducing llvm-cm: A Cost Model Tool
Dayann D'almeida via Phabricator via llvm-commits
- [PATCH] D140727: [XRay] Add initial support for loongarch64
Lu Weining via Phabricator via llvm-commits
- [PATCH] D154635: [7/8][RISCV] Add rounding mode control variant for conversion intrinsics between floating-point and integer
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154687: [RISCV] Narrow types of index operand matched pattern (shl (zext), C).
Craig Topper via Phabricator via llvm-commits
- [PATCH] D142879: [RISCV] Emit relocation for uleb128
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D154598: [CodeGen] Fix incorrectly detected reduction bug in ComplexDeinterleaving pass
mgabka via Phabricator via llvm-commits
- [PATCH] D153757: [RFC][TableGen][GlobalISel] Add Combiner Match Table Backend
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D153757: [RFC][TableGen][GlobalISel] Add Combiner Match Table Backend
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D154678: [InstCombine] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P
Jeremy Bennett via Phabricator via llvm-commits
- [PATCH] D153721: [RISCV] Add support for XCVsimd extension in CV32E40P
Simon Cook via Phabricator via llvm-commits
- [PATCH] D154314: [LV] Remove the reminder loop if we know the mask is always true
Allen zhong via Phabricator via llvm-commits
- [llvm] 336d728 - [InstCombine] Preserve inbounds when folding select of GEP
Nikita Popov via llvm-commits
- [PATCH] D154055: [InstCombine] Preserve inbounds when folding select of GEP
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154641: [ELF] Add --compress-sections
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154635: [7/8][RISCV] Add rounding mode control variant for conversion intrinsics between floating-point and integer
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D154604: [BOLT] Calculate output values using BOLTLinker
Job Noorman via Phabricator via llvm-commits
- [PATCH] D154636: [8/8][RISCV] Add rounding mode control variant for vfredosum, vfredusum, vfwredosum, vfwredusum
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D138135: [lld][ELF] Support LoongArch
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D145265: [Pipeline] Remove GlobalCleanupPM
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D140727: [XRay] Add initial support for loongarch64
Limin Zhang via Phabricator via llvm-commits
- [PATCH] D154604: [BOLT] Calculate output values using BOLTLinker
Job Noorman via Phabricator via llvm-commits
- [PATCH] D140727: [XRay] Add initial support for loongarch64
Limin Zhang via Phabricator via llvm-commits
- [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable
Mel Chen via Phabricator via llvm-commits
- [PATCH] D154678: [InstCombine] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D154579: [InstCombine] Only perform one iteration
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154641: [ELF] Add --compress-sections
Peter Smith via Phabricator via llvm-commits
- [PATCH] D154307: [InstructionSimplify] Avoid simplifying ICmp without parent
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- [llvm] 7d06b49 - [gn build] Port c0221e006d47
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- [PATCH] D154708: Fix buffer overflow
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- [PATCH] D154281: [CodeGen] Store SP adjustment in MachineBasicBlock. NFCI.
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- [PATCH] D154281: [CodeGen] Store SP adjustment in MachineBasicBlock. NFCI.
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- [PATCH] D154638: Emit a .debug_addr section with dsymutil
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- [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable
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- [PATCH] D144534: [DAGCombine] Fold SETCC_OEQ(x, Inf) into IS_FPCLASS
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- [PATCH] D154210: AMDGPU: Add some notes about amdgpu-flat-work-group-size
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- [PATCH] D149759: [symbolizer] Support symbol lookup
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- [PATCH] D152414: AMDGPU: Do not not force alwaysinline with calls and module LDS enabled
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- [PATCH] D123172: Transforms: Fix code duplication between LowerAtomic and AtomicExpand
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- [llvm] fa90f6b - TTI: Pass function to hasBranchDivergence in a few passes
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- [llvm] 5a67fa2 - [ADT] fix filter_iterator_impl::operator++
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- [PATCH] D154508: [TLI][AArch64] Add mappings to vectorized functions from ArmPL
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- [PATCH] D152921: [lld] Synthesize metadata for MTE globals
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- [PATCH] D146121: [DAG] Move lshr narrowing from visitANDLike to SimplifyDemandedBits
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- [PATCH] D117118: [NVPTX] Fix shr/and pair replace with bfe
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- [PATCH] D154535: [RISCV] Add tests for unaligned segmented loads and stores
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- [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case
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- [PATCH] D154130: [lit] Avoid os.path.realpath on Windows due to MAX_PATH limitations
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Alex Brachet via llvm-commits
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- [PATCH] D154722: [AArch64] Refactor AArch64InstrInfo::isAsCheapAsAMove (NFC)
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- [llvm] 427278d - [RISCV] Remove pseudos for vwcvt.f.x(u) with rounding mode.
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- [PATCH] D154653: [RISCV] Remove pseudos for vwcvt.f.x(u) with rounding mode.
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- [PATCH] D154722: [AArch64] Refactor AArch64InstrInfo::isAsCheapAsAMove (NFC)
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- [PATCH] D154210: AMDGPU: Add some notes about amdgpu-flat-work-group-size
Yaxun Liu via Phabricator via llvm-commits
- [compiler-rt] a34e702 - [ASAN] Add mmap and munmap interceptor in ASAN
Kirill Stoimenov via llvm-commits
- [PATCH] D147539: [LV] Enable stride versioning to support Fortran IR
Peixin Qiao via Phabricator via llvm-commits
- [llvm] 6f90808 - [RISCV] Add a guard condition to orc_b/brev8 handling in ReplaceNodeResults.
Craig Topper via llvm-commits
- [PATCH] D147990: [BPF] Undo transformation for LICM.cpp:hoistMinMax()
Yonghong Song via Phabricator via llvm-commits
- [PATCH] D154678: [InstCombine] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154661: Appease clang-tidy
Tamir Duberstein via Phabricator via llvm-commits
- [PATCH] D146121: [DAG] Move lshr narrowing from visitANDLike to SimplifyDemandedBits
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D154725: [SimplifyLibCalls] Fold strcmp for short string literals
Maksim Kita via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Wenlei He via Phabricator via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [llvm] 787b5ad - revert filter_iterator_impl::operator++ changes
Alex Brachet via llvm-commits
- [PATCH] D154678: [InstCombine] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154726: [RISCV] Match shl_vl (ext_vl v, splat 1) to vwadd_vl
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [llvm] 54eafd1 - Appease clang-tidy
Scott Linder via llvm-commits
- [PATCH] D154661: Appease clang-tidy
Scott Linder via Phabricator via llvm-commits
- [PATCH] D152828: [MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D152730: [ConstraintElim] Add A < B if A is an increasing phi for A != B.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152730: [ConstraintElim] Add A < B if A is an increasing phi for A != B.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154606: [PowerPC] Add DFP test instruction definitions and MC tests
Kamau Bridgeman via Phabricator via llvm-commits
- [PATCH] D154641: [ELF] Add --compress-sections
Fangrui Song via Phabricator via llvm-commits
- [llvm] eb98aba - [LLVM-C] Use unwrapDI in LLVMDITypeGetName
Scott Linder via llvm-commits
- [PATCH] D154630: [LLVM-C] Use unwrapDI in LLVMDITypeGetName
Scott Linder via Phabricator via llvm-commits
- [PATCH] D154630: [LLVM-C] Use unwrapDI in LLVMDITypeGetName
Scott Linder via Phabricator via llvm-commits
- [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D154641: [ELF] Add --compress-sections
Peter Smith via Phabricator via llvm-commits
- [llvm] b7836d8 - [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Yashwant Singh via llvm-commits
- [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D154472: [NFC]add initialization for EmitCompactUnwindNonCanonical in ctor
Vy Nguyen via Phabricator via llvm-commits
- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
Manish Kausik H via Phabricator via llvm-commits
- [PATCH] D154348: Ignore modified attribute list if it yields invalid IR
Manish Kausik H via Phabricator via llvm-commits
- [PATCH] D154717: [LV] Check if ops can safely be truncated in computeMinimumValueSizes.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154543: [llvm] Move StringExtras.h include from Error.h to Error.cpp
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154210: AMDGPU: Add some notes about amdgpu-flat-work-group-size
Siu Chi Chan via Phabricator via llvm-commits
- [PATCH] D154543: [llvm] Move StringExtras.h include from Error.h to Error.cpp
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154717: [LV] Check if ops can safely be truncated in computeMinimumValueSizes.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D149759: [symbolizer] Support symbol lookup
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D143759: [AMDGPU] Implement whole wave register spill
Yashwant Singh via Phabricator via llvm-commits
- [llvm] b78b36e - [AMDGPU] Implement whole wave register spill
Yashwant Singh via llvm-commits
- [PATCH] D143759: [AMDGPU] Implement whole wave register spill
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D143762: [AMDGPU] Enable whole wave register copy
Yashwant Singh via Phabricator via llvm-commits
- [compiler-rt] 1ff3a5d - [scudo] Allow pushing single block to the freelist of BatchClass
Chia-hung Duan via llvm-commits
- [llvm] b4a62b1 - [AMDGPU] Enable whole wave register copy
Yashwant Singh via llvm-commits
- [PATCH] D143762: [AMDGPU] Enable whole wave register copy
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D151730: [RISCV] Support target attribute for function
Philip Reames via Phabricator via llvm-commits
- [llvm] 4fd186d - [PEI] Simplify iterator handling in replaceFrameIndicesBackward. NFCI.
Jay Foad via llvm-commits
- [llvm] fa78983 - [PEI][Mips] Switch to backwards frame index elimination
Jay Foad via llvm-commits
- [PATCH] D154346: [PEI] Simplify iterator handling in replaceFrameIndicesBackward. NFCI.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D154347: [PEI][Mips] Switch to backwards frame index elimination
Jay Foad via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Wenlei He via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D124196: [AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Wenlei He via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Lei Wang via Phabricator via llvm-commits
- [llvm] 7a98f08 - [AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs
Yashwant Singh via llvm-commits
- [PATCH] D124196: [AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D154729: [RISCV] Support i32 clmul* intrinsics on RV64.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154678: [InstCombine] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D154665: fixed invalid symbol handling in ELFObjectFile::getSymbolName
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Wenlei He via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D154589: MIPS: setMaxAtomicSizeInBitsSupported to 0 for MIPS I
Fangrui Song via Phabricator via llvm-commits
- [llvm] 2b0ceae - [gn build] Port b4a62b1fa546
LLVM GN Syncbot via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Wenlei He via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D154589: MIPS: setMaxAtomicSizeInBitsSupported to 0 for MIPS I
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D143198: DAG: Lower is.fpclass fcInf to fcmp of fabs
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D154665: fixed invalid symbol handling in ELFObjectFile::getSymbolName
Dayann D'almeida via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Lei Wang via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D153757: [RFC][TableGen][GlobalISel] Add Combiner Match Table Backend
Amara Emerson via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D154732: [WebAssembly] Add a test for unsupported inline assembly
David Mo via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Wenlei He via Phabricator via llvm-commits
- [PATCH] D130315: [BOLT][DWARF] Implement new mechanism for DWARFRewriter
Greg Clayton via Phabricator via llvm-commits
- [PATCH] D154686: [AIX][XCOFF] make integrated-as as default on AIX.
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D154734: [WebAssembly] Report error for inline assembly with unsupported opcodes
David Mo via Phabricator via llvm-commits
- [PATCH] D154734: [WebAssembly] Report error for inline assembly with unsupported opcodes
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D130315: [BOLT][DWARF] Implement new mechanism for DWARFRewriter
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D154734: [WebAssembly] Report error for inline assembly with unsupported opcodes
David Mo via Phabricator via llvm-commits
- [PATCH] D154735: ValueTracking: ldexp cannot return denormals based on range of exponent
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154734: [WebAssembly] Report error for inline assembly with unsupported opcodes
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D154734: [WebAssembly] Report error for inline assembly with unsupported opcodes
Sam Clegg via Phabricator via llvm-commits
- [llvm] b0e249d - Reland "[PowerPC] Remove extend between shift and and"
Nemanja Ivanovic via llvm-commits
- [compiler-rt] 9b79e15 - [ASAN] Disable mmap test on Windows.
Kirill Stoimenov via llvm-commits
- [PATCH] D153901: AMDGPU: Delete custom combine on class intrinsic
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D154203: llvm-reduce: Add broken testcase that shows uselistorder problem
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D154188: [IRCE] Implement runtime overflow check for computed range's end
Aleksandr Popov via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Wenlei He via Phabricator via llvm-commits
- [PATCH] D148216: [UTC] Add fallback support for specific metadata, and check their defs
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D153757: [RFC][TableGen][GlobalISel] Add Combiner Match Table Backend
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154678: [InstCombine] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154737: [BOLT] Adding stale-related logging
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D153084: AMDGPU: Partially fix not respecting dynamic denormal mode
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D154734: [WebAssembly] Report error for inline assembly with unsupported opcodes
David Mo via Phabricator via llvm-commits
- [PATCH] D148216: [UTC] Add fallback support for specific metadata, and check their defs
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D154726: [RISCV] Match shl_vl (ext_vl v, splat 1) to vwadd_vl
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Lei Wang via Phabricator via llvm-commits
- [PATCH] D154738: [SLP]Introduce isValiVectorOp to check if the vector instruction is going to be scalarized.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D154678: [InstCombine] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Lei Wang via Phabricator via llvm-commits
- [PATCH] D154130: [lit] Avoid os.path.realpath on Windows due to MAX_PATH limitations
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154725: [SimplifyLibCalls] Fold strcmp for short string literals
Nikita Popov via Phabricator via llvm-commits
- [llvm] 64d3254 - AMDGPU: Delete custom combine on class intrinsic
Matt Arsenault via llvm-commits
- [PATCH] D153901: AMDGPU: Delete custom combine on class intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 7cc0be0 - [LV] Skip VFs < iterations remaining for epilogue vectorization.
Florian Hahn via llvm-commits
- [PATCH] D154264: [LV] Skip VFs < iterations remaining for epilogue vectorization.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154739: [RISCV] Check for alignment when selecting whole register loads/stores
Luke Lau via Phabricator via llvm-commits
- [PATCH] D154210: AMDGPU: Add some notes about amdgpu-flat-work-group-size
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154130: [lit] Avoid os.path.realpath on Windows due to MAX_PATH limitations
Tristan Labelle via Phabricator via llvm-commits
- [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154739: [RISCV] Check for alignment when selecting whole register loads/stores
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154739: [RISCV] Check for alignment when selecting whole register loads/stores
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154741: [llvm] Allow SMLoc to be used in constexpr context
wren romano via Phabricator via llvm-commits
- [PATCH] D154739: [RISCV] Check for alignment when selecting whole register loads/stores
Luke Lau via Phabricator via llvm-commits
- [PATCH] D154210: AMDGPU: Add some notes about amdgpu-flat-work-group-size
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D154741: [llvm] Allow SMLoc to be used in constexpr context
Aart Bik via Phabricator via llvm-commits
- [PATCH] D154739: [RISCV] Check for alignment when selecting whole register loads/stores
Luke Lau via Phabricator via llvm-commits
- [PATCH] D154717: [LV] Check if ops can safely be truncated in computeMinimumValueSizes.
Nikita Popov via Phabricator via llvm-commits
- [compiler-rt] 399eb56 - [scudo] Explicit casting for u16 arithmetic operation
Chia-hung Duan via llvm-commits
- [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.
Alexey Bataev via Phabricator via llvm-commits
- [llvm] 7cc0be0 - [LV] Skip VFs < iterations remaining for epilogue vectorization.
Philip Reames via llvm-commits
- [PATCH] D154739: [RISCV] Check for alignment when selecting whole register loads/stores
Luke Lau via Phabricator via llvm-commits
- [PATCH] D154665: fixed invalid symbol handling in ELFObjectFile::getSymbolName
Dayann D'almeida via Phabricator via llvm-commits
- [PATCH] D143602: Allow 32-bit pointers to be written in 64-bit slots
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D154203: llvm-reduce: Add broken testcase that shows uselistorder problem
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154536: [RISCV] Check for alignment when lowering interleaved/deinterleaved loads/stores
Luke Lau via Phabricator via llvm-commits
- [PATCH] D154543: [Support] Move StringExtras.h include from Error.h to Error.cpp
Elliot Goodrich via Phabricator via llvm-commits
- [PATCH] D154565: [InstCombine] Fold icmps comparing uadd_sat with a constant
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154678: [InstCombine] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154566: [InstCombine] Test cases for D154565
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154543: [Support] Move StringExtras.h include from Error.h to Error.cpp
Elliot Goodrich via Phabricator via llvm-commits
- [PATCH] D154678: [InstCombine] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154647: [RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D138883: [PowerPC] find and reuse ConstantSplatVector to combine constant store into extract and store
Nemanja Ivanovic via Phabricator via llvm-commits
- [PATCH] D154414: [NFC][AMDGPU] Default initialize the Subtarget
Nick Desaulniers via Phabricator via llvm-commits
- [llvm] bab6902 - [llvm-rc] Improve help printouts
Martin Storsjö via llvm-commits
- [PATCH] D154545: [llvm-rc] Improve help printouts
Martin Storsjö via Phabricator via llvm-commits
- [llvm] 7cc0be0 - [LV] Skip VFs < iterations remaining for epilogue vectorization.
Florian Hahn via llvm-commits
- [PATCH] D154734: [WebAssembly] Report error for inline assembly with unsupported opcodes
Derek Schuff via Phabricator via llvm-commits
- [llvm] aee851f - Revert "[LV] Skip VFs < iterations remaining for epilogue vectorization."
Florian Hahn via llvm-commits
- [PATCH] D153829: [AArch64] Move branch relaxation after bbsection assignment
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D154744: [RISCV] Don't allow X0 to be used for 'r' constraint in inline assembly
Craig Topper via Phabricator via llvm-commits
- [llvm] 14ec3f4 - [LV] Skip VFs > # iterations remaining for epilogue vectorization.
Florian Hahn via llvm-commits
- [PATCH] D154744: [RISCV] Don't allow X0 to be used for 'r' constraint in inline assembly
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D130315: [BOLT][DWARF] Implement new mechanism for DWARFRewriter
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D148855: [SLP]Improve tryToGatherExtractElements by using per-register analysis.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D154744: [RISCV] Don't allow X0 to be used for 'r' constraint in inline assembly
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154744: [RISCV] Don't allow X0 to be used for 'r' constraint in inline assembly
Jessica Clarke via Phabricator via llvm-commits
- [llvm] 310f839 - DAG: Lower is.fpclass fcInf to fcmp of fabs
Matt Arsenault via llvm-commits
- [PATCH] D143198: DAG: Lower is.fpclass fcInf to fcmp of fabs
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143539: [AMDGPU] Add AMDGPU support for llvm-objcopy
Aakanksha Patil via Phabricator via llvm-commits
- [PATCH] D149860: [TextAPI] Introduce SymbolSet
Zixu Wang via Phabricator via llvm-commits
- [PATCH] D154717: [LV] Check if ops can safely be truncated in computeMinimumValueSizes.
Florian Hahn via Phabricator via llvm-commits
- [llvm] c636274 - [gn] Enable check-lsan on Linux
Leonard Grey via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Wenlei He via Phabricator via llvm-commits
- [PATCH] D154734: [WebAssembly] Report error for inline assembly with unsupported opcodes
David Mo via Phabricator via llvm-commits
- [PATCH] D154749: [BOLT][NFC] Simplify DataAggregator/YAMLProfileReader
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D154717: [LV] Check if ops can safely be truncated in computeMinimumValueSizes.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154732: [WebAssembly] Add a test for unsupported inline assembly
David Mo via Phabricator via llvm-commits
- [PATCH] D138135: [lld][ELF] Support LoongArch
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154594: Add version comparison in BooleanExpression for lit testing
Louis Dionne via Phabricator via llvm-commits
- [llvm] d5241e4 - [gn build] Port 2a65d0388ca0
LLVM GN Syncbot via llvm-commits
- [PATCH] D138135: [lld][ELF] Support LoongArch
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D138135: [lld][ELF] Support LoongArch
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D149966: [SLP]Include cost of the reshuffling for same nodes with resizing.
Alexey Bataev via Phabricator via llvm-commits
- [llvm] bfefeeb - [SamplePGO] Fix ICE that callee samples returns null while finding import functions
via llvm-commits
- [PATCH] D154637: [SamplePGO] Fix ICE that callee samples returns null while finding import functions
Lei Wang via Phabricator via llvm-commits
- [PATCH] D72680: [ms] [llvm-ml] Add a draft MASM parser
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154202: [MC/AsmLexer] Add '?' (Question) token
Fangrui Song via Phabricator via llvm-commits
- [compiler-rt] 3c0ae1f - [ASAN] Moved mmap/munmap test to posix.
Kirill Stoimenov via llvm-commits
- [PATCH] D154136: [RISCV] Add SEW to RISCVInversePseudoTable
Craig Topper via Phabricator via llvm-commits
- [llvm] 30fd35f - AMDGPU: Add some notes about amdgpu-flat-work-group-size
Matt Arsenault via llvm-commits
- [llvm] 11ad540 - llvm-reduce: Add broken testcase that shows uselistorder problem
Matt Arsenault via llvm-commits
- [PATCH] D154203: llvm-reduce: Add broken testcase that shows uselistorder problem
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154210: AMDGPU: Add some notes about amdgpu-flat-work-group-size
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154754: [llvm-objdump] Change errors to warnings for symbol section name dumping
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154665: fixed invalid symbol handling in ELFObjectFile::getSymbolName
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154245: [RISCV] Remove legacy TA/TU pseudo distinction for binary instructions
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154620: [RISCV] Cleanup dead complexity in RISCVMaskedPseudo after TA/TU merge refactoring [nfc]
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154725: [SimplifyLibCalls] Fold strcmp for short string literals
Eli Friedman via Phabricator via llvm-commits
- [llvm] 3a3ea43 - [OpenMPOpt][NFC] Precommit test for AAExecutionDomain bug
Johannes Doerfert via llvm-commits
- [llvm] 4009f84 - [OpenMPOpt] Check for execution with an aligned barrier
Johannes Doerfert via llvm-commits
- [llvm] 24656e9 - [OpenMPOpt] The kernel end is not necessarily an aligned barrier
Johannes Doerfert via llvm-commits
- [llvm] 7e77e81 - [Attributor][FIX] Require the store to be aligned for value propagation
Johannes Doerfert via llvm-commits
- [llvm] fe12d31 - [OpenMPOpt][FIX] Propagate IsReachingAlignedBarrier flag through calls
Johannes Doerfert via llvm-commits
- [PATCH] D154620: [RISCV] Cleanup dead complexity in RISCVMaskedPseudo after TA/TU merge refactoring [nfc]
Craig Topper via Phabricator via llvm-commits
- [llvm] 1575063 - [RISCV] Match shl_vl (ext_vl v, splat 1) to vwadd_vl
via llvm-commits
- [PATCH] D154726: [RISCV] Match shl_vl (ext_vl v, splat 1) to vwadd_vl
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D154754: [llvm-objdump] Change errors to warnings for symbol section name dumping
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154754: [llvm-objdump] Change errors to warnings for symbol section name dumping
Fangrui Song via Phabricator via llvm-commits
- [llvm] 1748694 - [AArch64] Refactor predicate to check for a ZR operand (NFC)
Evandro Menezes via llvm-commits
- [PATCH] D130315: [BOLT][DWARF] Implement new mechanism for DWARFRewriter
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D151906: [BOLT][DWARF] Numerous fixes for a new DWARFRewriter
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D151908: [BOLT][DWARF] Output DWO files as they are being processed
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D151909: [BOLT][DWARF] Change to process and write out TUs first then CUs in batches
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D154754: [llvm-objdump] Change errors to warnings for symbol section name dumping
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D86067: GlobalISel: Add opcode for llvm.memcpy.inline
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D154756: [AArch64] Add scheduling model for Neoverse V1
Evandro Menezes via Phabricator via llvm-commits
- [PATCH] D154687: [RISCV] Narrow types of index operand matched pattern (shl (zext), C).
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D154756: [AArch64] Add scheduling model for Neoverse V1
Thorsten via Phabricator via llvm-commits
- [PATCH] D154686: [AIX][XCOFF] make integrated-as as default on AIX.
ChenZheng via Phabricator via llvm-commits
- [PATCH] D105759: Implement P2361 Unevaluated string literals
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P
QIHAN CAI via Phabricator via llvm-commits
- [PATCH] D154565: [InstCombine] Fold icmps comparing uadd_sat with a constant
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D154565: [InstCombine] Fold icmps comparing uadd_sat with a constant
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D141931: [BOLT] Fix error for -reg-reassign option
hezuoqiang via Phabricator via llvm-commits
- [PATCH] D154754: [llvm-objdump] Change errors to warnings for symbol section name dumping
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D153394: [AArch64][GlobalISel] Selection support for v2s16 G_ANYEXT
Allen zhong via Phabricator via llvm-commits
- [llvm] ed91084 - [InstCombine] Test cases for D154565
Dhruv Chawla via llvm-commits
- [llvm] 23f0f06 - [InstCombine] Fold icmps comparing uadd_sat with a constant
Dhruv Chawla via llvm-commits
- [PATCH] D154566: [InstCombine] Test cases for D154565
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D154565: [InstCombine] Fold icmps comparing uadd_sat with a constant
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D139147: [libc++][Android] Enable libc++ testing on Android
Ryan Prichard via Phabricator via llvm-commits
- [PATCH] D154760: [DAGCombine] Canonicalize operands for visitANDLike
hev via Phabricator via llvm-commits
- [PATCH] D153394: [AArch64][GlobalISel] Selection support for v2s16 G_ANYEXT
Thorsten via Phabricator via llvm-commits
- [PATCH] D154314: [LV] Remove the reminder loop if we know the mask is always true
Allen zhong via Phabricator via llvm-commits
- [PATCH] D105759: Implement P2361 Unevaluated string literals
Corentin Jabot via Phabricator via llvm-commits
- [PATCH] D154762: [LoongArch] Implement isLegalAddImmediate
hev via Phabricator via llvm-commits
- [PATCH] D151047: [clang-format] Fix indentation for selective formatting.
Sedenion via Phabricator via llvm-commits
- [llvm] 39d8e6e - Add missing StringExtras.h includes
Elliot Goodrich via llvm-commits
- [llvm] fc6b126 - [Support] Move StringExtras.h include from Error.h to Error.cpp
Elliot Goodrich via llvm-commits
- [PATCH] D154543: [Support] Move StringExtras.h include from Error.h to Error.cpp
Elliot Goodrich via Phabricator via llvm-commits
- [PATCH] D149440: [yaml2obj] Add support for load config section data.
Jacek Caban via Phabricator via llvm-commits
- [llvm] 86fb14a - Revert "[Support] Move StringExtras.h include from Error.h to Error.cpp"
Elliot Goodrich via llvm-commits
- [PATCH] D154528: [AMDGPU][GlobalISel] Generate fast fp64-to-fp16 conversions in unsafe mode.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D134813: Properly print unnamed TagDecl objects in diagnostics
Jonas Hahnfeld via Phabricator via llvm-commits
- [PATCH] D154763: [Support] Move StringExtras.h include from Error.h to Error.cpp (attempt 3)
Elliot Goodrich via Phabricator via llvm-commits
- [PATCH] D139147: [libc++][Android] Enable libc++ testing on Android
Ryan Prichard via Phabricator via llvm-commits
- [PATCH] D154760: [DAGCombine] Canonicalize operands for visitANDLike
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D152277: (WIP) [MemCpyOpt] precommit tests to add inter-BB stack-move optimization
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D153453: (WIP)[MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
Ben Shi via Phabricator via llvm-commits
- [PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'
Ben Shi via Phabricator via llvm-commits
- [PATCH] D109192: Support: introduce public API annotation support
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D154765: APFloat: Add some missing function declarations
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D154765: APFloat: Add some missing function declarations
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D134813: Properly print unnamed TagDecl objects in diagnostics
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D134813: Properly print unnamed TagDecl objects in diagnostics
Jonas Hahnfeld via Phabricator via llvm-commits
- [PATCH] D134813: Properly print unnamed TagDecl objects in diagnostics
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D154766: [GlobalISel] convergent intrinsics
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D154767: [CSKY][test][NFC] Add more tests of conditional branch and value select
Ben Shi via Phabricator via llvm-commits
- [PATCH] D154767: [CSKY][test][NFC] Add more tests of conditional branch and value select
Ben Shi via Phabricator via llvm-commits
- [PATCH] D134813: Properly print unnamed TagDecl objects in diagnostics
Jonas Hahnfeld via Phabricator via llvm-commits
- [PATCH] D154768: [CSKY] Optimize conditional branch and value select with BTSTI
Ben Shi via Phabricator via llvm-commits
- [PATCH] D154768: [CSKY] Optimize conditional branch and value select with BTSTI
Ben Shi via Phabricator via llvm-commits
- [PATCH] D154130: [lit] Avoid os.path.realpath on Windows due to MAX_PATH limitations
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D154768: [CSKY] Optimize conditional branch and value select with BTSTI
Ben Shi via Phabricator via llvm-commits
- [PATCH] D134813: Properly print unnamed TagDecl objects in diagnostics
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D154768: [CSKY] Optimize conditional branch and value select with BTSTI
Ben Shi via Phabricator via llvm-commits
- [PATCH] D154768: [CSKY] Optimize conditional branch and value select with BTSTI
Ben Shi via Phabricator via llvm-commits
- [PATCH] D154760: [DAGCombine] Canonicalize operands for visitANDLike
hev via Phabricator via llvm-commits
- [PATCH] D154760: [DAGCombine] Canonicalize operands for visitANDLike
hev via Phabricator via llvm-commits
- [PATCH] D153963: [InstCombine] Fold binop of select and cast of select condition
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D153963: [InstCombine] Fold binop of select and cast of select condition
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D154763: [Support] Move StringExtras.h include from Error.h to Error.cpp (attempt 3)
Elliot Goodrich via Phabricator via llvm-commits
- [PATCH] D153963: [InstCombine] Fold binop of select and cast of select condition
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154392: [llvm] Remove uses of Type::getPointerTo() (NFC)
Youngsuk Kim via Phabricator via llvm-commits
- [llvm] f69b9b7 - [llvm] Remove uses of Type::getPointerTo() (NFC)
via llvm-commits
- [PATCH] D154392: [llvm] Remove uses of Type::getPointerTo() (NFC)
Youngsuk Kim via Phabricator via llvm-commits
- [PATCH] D154725: [SimplifyLibCalls] Fold strcmp for short string literals
Maksim Kita via Phabricator via llvm-commits
- [PATCH] D154725: [SimplifyLibCalls] Fold strcmp for short string literals
Maksim Kita via Phabricator via llvm-commits
- [PATCH] D154725: [SimplifyLibCalls] Fold strcmp for short string literals
Maksim Kita via Phabricator via llvm-commits
- [PATCH] D154766: [GlobalISel] convergent intrinsics
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D154766: [GlobalISel] convergent intrinsics
Thorsten via Phabricator via llvm-commits
- [PATCH] D154725: [SimplifyLibCalls] Fold strcmp for short string literals
Dávid Bolvanský via Phabricator via llvm-commits
- [llvm] a11efd4 - Add missing StringExtras.h includes
Elliot Goodrich via llvm-commits
- [llvm] 2e2743b - [Support] Move StringExtras.h include from Error.h to Error.cpp
Elliot Goodrich via llvm-commits
- [PATCH] D154763: [Support] Move StringExtras.h include from Error.h to Error.cpp (attempt 3)
Elliot Goodrich via Phabricator via llvm-commits
- [llvm] d2fb8f2 - Revert "[Support] Move StringExtras.h include from Error.h to Error.cpp"
Elliot Goodrich via llvm-commits
- [PATCH] D154725: [SimplifyLibCalls] Fold strcmp for short string literals
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154725: [SimplifyLibCalls] Fold strcmp for short string literals
Maksim Kita via Phabricator via llvm-commits
- [PATCH] D154725: [SimplifyLibCalls] Fold strcmp for short string literals
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D154725: [SimplifyLibCalls] Fold strcmp for short string literals
Maksim Kita via Phabricator via llvm-commits
- [llvm] 9e362e5 - Fix -Wunused-vairable on release build, NFC
Haojian Wu via llvm-commits
- [PATCH] D154756: [AArch64] Add scheduling model for Neoverse V1
Evandro Menezes via Phabricator via llvm-commits
- [PATCH] D154775: [Support] Move StringExtras.h include from Error.h to Error.cpp (part 4)
Elliot Goodrich via Phabricator via llvm-commits
- [PATCH] D154775: [Support] Move StringExtras.h include from Error.h to Error.cpp (part 4)
Elliot Goodrich via Phabricator via llvm-commits
- [PATCH] D154776: IFSStub destructor should be virtual
Amirreza Ashouri via Phabricator via llvm-commits
- [PATCH] D153268: [DWARFLinkerParallel] Add limited functionality to DWARFLinkerParallel.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D154777: [LLD] [COFF] Warn about pseudo relocations that are too narrow
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D154779: [NFC] make TypeInfer::MergeInTypeInfo const
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D154780: [NFC] make TypeInfer::expandOverloads const
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D154781: Revert "[TableGen] Use heap allocated arrays instead of vectors for TreePatternNode::Types and ResultPerm. NFC"
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D154756: [AArch64] Add scheduling model for Neoverse V1
Evandro Menezes via Phabricator via llvm-commits
- [PATCH] D154781: Revert "[TableGen] Use heap allocated arrays instead of vectors for TreePatternNode::Types and ResultPerm. NFC"
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154781: Revert "[TableGen] Use heap allocated arrays instead of vectors for TreePatternNode::Types and ResultPerm. NFC"
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154780: [NFC] make TypeInfer::expandOverloads const
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154779: [NFC] make TypeInfer::MergeInTypeInfo const
Craig Topper via Phabricator via llvm-commits
- [PATCH] D152399: [CodeGen] Fine tune MachineFunctionSplitPass (MFS) for FSAFDO.
Han Shen via Phabricator via llvm-commits
- [PATCH] D152399: [CodeGen] Fine tune MachineFunctionSplitPass (MFS) for FSAFDO.
Han Shen via Phabricator via llvm-commits
- [PATCH] D151283: [WIP][llvm-cov] Support a Hierarchical Structure for HTML Coverage Report Generating
Yuhao Gu via Phabricator via llvm-commits
- [PATCH] D154756: [AArch64] Add scheduling model for Neoverse V1
Thorsten via Phabricator via llvm-commits
- [llvm] 0f9f951 - [NFC] Add optional include to Format.h
Evan Wilde via llvm-commits
- [PATCH] D154664: [NFC] Add some missing header includes
Evan Wilde via Phabricator via llvm-commits
- [PATCH] D152277: [MemCpyOpt] precommit tests to add single-BB stack-move optimization (NFC)
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D148417: [compiler-rt][profiling] Add an incremental buffer writing mode to libprofile
David Tellenbach via Phabricator via llvm-commits
- [PATCH] D153197: [AVR] Expand shifts during AVRISelLowering
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D154777: [LLD] [COFF] Warn about pseudo relocations that are too narrow
Alvin Wong via Phabricator via llvm-commits
- [llvm] b255721 - [NFC] make TypeInfer::MergeInTypeInfo const
Tomas Matheson via llvm-commits
- [PATCH] D154779: [NFC] make TypeInfer::MergeInTypeInfo const
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D154780: [NFC] make TypeInfer::expandOverloads const
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D154281: [CodeGen] Store SP adjustment in MachineBasicBlock. NFCI.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D154281: [CodeGen] Store SP adjustment in MachineBasicBlock. NFCI.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D153197: [AVR] Expand shifts during AVRISelLowering
Ben Shi via Phabricator via llvm-commits
- [PATCH] D154782: [NFC] Fix builds on recent GCC with C++20 enabled
Alexander Batashev via Phabricator via llvm-commits
- [PATCH] D154782: [NFC] Fix builds on recent GCC with C++20 enabled
Alexander Batashev via Phabricator via llvm-commits
- [llvm] 4c66b03 - [NFC] make TypeInfer::expandOverloads const
Tomas Matheson via llvm-commits
- [PATCH] D154780: [NFC] make TypeInfer::expandOverloads const
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D150069: [InstCombine] Precommit a test
Peixin Qiao via Phabricator via llvm-commits
- [llvm] 6d4a3e9 - Revert "[TableGen] Use heap allocated arrays instead of vectors for TreePatternNode::Types and ResultPerm. NFC"
Tomas Matheson via llvm-commits
- [PATCH] D154781: Revert "[TableGen] Use heap allocated arrays instead of vectors for TreePatternNode::Types and ResultPerm. NFC"
Tomas Matheson via Phabricator via llvm-commits
- [llvm] 758c464 - [CGP] Enable CodeGenPrepares phi type convertion.
David Green via llvm-commits
- [PATCH] D154781: Revert "[TableGen] Use heap allocated arrays instead of vectors for TreePatternNode::Types and ResultPerm. NFC"
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D141931: [BOLT] Fix error for -reg-reassign option
hezuoqiang via Phabricator via llvm-commits
- [PATCH] D154785: [AVR] Expand all non-8-bit shifts
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D153197: [AVR] Expand shifts during AVRISelLowering
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D149966: [SLP]Include cost of the reshuffling for same nodes with resizing.
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] 4c0cfd8 - [Support] Move StringExtras.h include from Error.h to Error.cpp
Elliot Goodrich via llvm-commits
- [PATCH] D154775: [Support] Move StringExtras.h include from Error.h to Error.cpp (part 4)
Elliot Goodrich via Phabricator via llvm-commits
- [PATCH] D151283: [llvm-cov] Support a Hierarchical Structure for HTML Coverage Report Generating
Yuhao Gu via Phabricator via llvm-commits
- [PATCH] D153721: [RISCV] Add support for XCVsimd extension in CV32E40P
Alex Bradbury via Phabricator via llvm-commits
- [llvm] 19551f0 - Revert "[Support] Move StringExtras.h include from Error.h to Error.cpp"
Elliot Goodrich via llvm-commits
- [PATCH] D154789: [InstCombine] Add tests for bitwise (A << X, zext(icmp)) -> zext (bitwise(A<0, icmp)) fold (NFC)
Hongyu Chen via Phabricator via llvm-commits
- [PATCH] D154725: [SimplifyLibCalls] Fold strcmp for short string literals
Maksim Kita via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A << X, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Hongyu Chen via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A << X, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Nikita Popov via Phabricator via llvm-commits
- [llvm] 848f6ab - [X86] Add tests showing failure by matchAddressRecursively to peek through ZEXT nodes to match foldMaskAndShiftToExtract
Simon Pilgrim via llvm-commits
- [llvm] 7428739 - [X86] matchAddressRecursively - peek through ZEXT nodes to match foldMaskAndShiftToExtract
Simon Pilgrim via llvm-commits
- [PATCH] D146121: [DAG] Move lshr narrowing from visitANDLike to SimplifyDemandedBits
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D154309: [LV] Do not add load to group if it moves across conflicting store.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D154744: [RISCV] Don't allow X0 to be used for 'r' constraint in inline assembly
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D154760: [DAGCombine] Canonicalize operands for visitANDLike
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D154760: [DAGCombine] Canonicalize operands for visitANDLike
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D151449: [RISCV] Add DAG combine for CTTZ/CTLZ in the case of input 0
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D154793: [DWARFLinkerParallel] Add support of accelerator tables to DWARFLinkerParallel.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D148417: [compiler-rt][profiling] Add an incremental buffer writing mode to libprofile
Jon Roelofs via Phabricator via llvm-commits
- [PATCH] D154794: [llvm] CYGWIN: Fix build of some plugins/library/unittests
Carlo Bramini via Phabricator via llvm-commits
- [llvm] e1b88a9 - [llvm-exegesis][NFC] imports `<cerrno>`
Christopher Di Bella via llvm-commits
- [PATCH] D154602: [clang][clangd] Don't crash/assert on -gsplit-dwarf=single without output
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D146121: [DAG] Move lshr narrowing from visitANDLike to SimplifyDemandedBits
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A << X, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A << X, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A << X, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D153800: [ARM] Adjust strd/ldrd codegen alignment requirements
Maurice Heumann via Phabricator via llvm-commits
- [PATCH] D154794: [llvm] CYGWIN: Fix build of some plugins/library/unittests
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D154136: [RISCV] Add SEW to RISCVInversePseudoTable
Michael Maitland via Phabricator via llvm-commits
- [llvm] 9259f41 - [VPlan] Clear reduction flags directly as VPlanTransform.
Florian Hahn via llvm-commits
- [PATCH] D150028: [VPlan] Clear reduction flags directly as VPlanTransform.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D150028: [VPlan] Clear reduction flags directly as VPlanTransform.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D154678: [InstCombine] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154782: [NFC] Fix builds on recent GCC with C++20 enabled
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D149773: [AMDGPU][IGLP] Add iglp_opt(1) strategy for single wave gemms
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D154686: [AIX][XCOFF] make integrated-as as default on AIX.
Brad Smith via Phabricator via llvm-commits
- [PATCH] D146121: [DAG] Move lshr narrowing from visitANDLike to SimplifyDemandedBits
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D148417: [compiler-rt][profiling] Add an incremental buffer writing mode to libprofile
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D151283: [llvm-cov] Support a Hierarchical Structure for HTML Coverage Report Generating
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D154802: [llvm][orc] Consider other ELF init sections as well
Jeff Niu via Phabricator via llvm-commits
- [PATCH] D154802: [llvm][orc] Consider other ELF init sections as well
Jeff Niu via Phabricator via llvm-commits
- [PATCH] D154804: [X86] Add tests for folding `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154805: [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154678: [InstCombine] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp
Noah Goldstein via Phabricator via llvm-commits
- [llvm] 02a4fce - [Attributor] Port AANonNull to the isImpliedByIR interface
Johannes Doerfert via llvm-commits
- [llvm] aae749b - [Attributor] Port AANoAlias to the isImpliedByIR interface
Johannes Doerfert via llvm-commits
- [llvm] 59fd610 - [Attributor] Port AANoUndef to the isImpliedByIR interface
Johannes Doerfert via llvm-commits
- [llvm] ebec3dd - [Attributor] Port AANoCapture to the isImpliedByIR interface
Johannes Doerfert via llvm-commits
- [llvm] 5163779 - [Attributor] Port AANoFree to the isImpliedByIR interface
Johannes Doerfert via llvm-commits
- [llvm] 0348652 - [Attributor] Port AAWillReturn to the checkAndQueryIRAttr interface
Johannes Doerfert via llvm-commits
- [llvm] 6e7eb72 - [Attributor] Port AAMustProgress to the checkAndQueryIRAttr interface
Johannes Doerfert via llvm-commits
- [llvm] c33fa5a - [Attributor] Port AANoUnwind to the isImpliedByIR interface
Johannes Doerfert via llvm-commits
- [llvm] c272728 - [Attributor] Port AANoSync to the isImpliedByIR interface
Johannes Doerfert via llvm-commits
- [llvm] 18d9f7e - [Attributor] Port AANoReturn to the isImpliedByIR interface
Johannes Doerfert via llvm-commits
- [llvm] ba7cc56 - [Attributor] Port AANoRecurse to the isImpliedByIR interface
Johannes Doerfert via llvm-commits
- [PATCH] D154806: [InstCombine] Add tests for transforming `(add (shl (neg X), Cnt))`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154807: [InstCombine] Transform `(add (shl (neg X), Cnt))` -> `(sub (shl X, Cnt))`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D149383: [SelectionDAG][WIP] Add support for evaluating SetCC based on knownbits
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D128059: [Clang] Add a warning on invalid UTF-8 in comments.
Fako via Phabricator via llvm-commits
- [PATCH] D149533: Regen some old tests; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154686: [AIX][XCOFF] make integrated-as as default on AIX.
ChenZheng via Phabricator via llvm-commits
- [llvm] 3b4c4ab - [IR] Remove unused forward declaration DILocation
Kazu Hirata via llvm-commits
- [llvm] 63111a5 - [IR] Remove unused forward declaration Pass
Kazu Hirata via llvm-commits
- [llvm] 4a3942e - [IPO] Remove unused declaration AAResults
Kazu Hirata via llvm-commits
- [llvm] 9c0c210 - [Scalar] Remove unused declaration ModulePass
Kazu Hirata via llvm-commits
- [llvm] caec941 - [Utils] Remove unused forward declaration CallGraph
Kazu Hirata via llvm-commits
- [llvm] 3ee98b2 - [Utils] Remove unused declaration FunctionPass
Kazu Hirata via llvm-commits
- [llvm] 65159a9 - [Vectorize] Remove unused forward declaration CmpInst
Kazu Hirata via llvm-commits
- [llvm] b8bb547 - [AIX][XCOFF] make integrated-as as default on AIX.
Brad Smith via llvm-commits
- [PATCH] D154686: [AIX][XCOFF] make integrated-as as default on AIX.
Brad Smith via Phabricator via llvm-commits
- [llvm] 60db0b8 - [IPO] Fix uused-variable warnings
Kazu Hirata via llvm-commits
- [PATCH] D149197: [X86] Add tests for `div/rem %x, (select c, <const>, 1)`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D149198: [DAGCombiner] Make it so that `udiv` can be folded with `(select c, NonZero, 1)`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D149299: [X86] Add tests for checking `isKnownNeverZero`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D149198: [DAGCombiner] Make it so that `udiv` can be folded with `(select c, NonZero, 1)`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D149199: [SelectionDAG] Fill in some more cases in `isKnownNeverZero`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D149199: [SelectionDAG] Fill in some more cases in `isKnownNeverZero`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)
Lehua Ding via Phabricator via llvm-commits
- [PATCH] D154472: [NFC]add initialization for EmitCompactUnwindNonCanonical in ctor
Chen Cheng via Phabricator via llvm-commits
- [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.
Chuanqi Xu via Phabricator via llvm-commits
- [PATCH] D154744: [RISCV] Don't allow X0 to be used for 'r' constraint in inline assembly
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D148411: [InstCombine] Add tests for (select (icmp x, Cp2_0), (binop y, Cp2_1), y); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D148744: [InstCombine] Refactor foldSelectICmpAndOr to use `decomposeBitTestICmp` instead of bespoke logic
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D148412: [InstCombine] Cleanup code in foldSelectICmpAndOr; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D148413: [InstCombine] Remove requirement on `trunc` in `slt/sgt` case in `foldSelectICmpAndOr`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D148744: [InstCombine] Refactor foldSelectICmpAndOr to use `decomposeBitTestICmp` instead of bespoke logic
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D148414: [InstCombine] Expand `foldSelectICmpAndOr` -> `foldSelectICmpAndBinOp` to work for any binop
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154808: [RISCV] Add tests for (and (add x, c1), (lshr y, c2))
hev via Phabricator via llvm-commits
- [PATCH] D148415: [InstCombine] Improve cost calculation in foldSelectICmpAndBinOp
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154760: [DAGCombine] Canonicalize operands for visitANDLike
hev via Phabricator via llvm-commits
- [PATCH] D154130: [lit] Avoid os.path.realpath on Windows due to MAX_PATH limitations
Chuanqi Xu via Phabricator via llvm-commits
- [PATCH] D148411: [InstCombine] Add tests for (select (icmp x, Cp2_0), (binop y, Cp2_1), y); NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D148412: [InstCombine] Cleanup code in foldSelectICmpAndOr; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D148413: [InstCombine] Remove requirement on `trunc` in `slt/sgt` case in `foldSelectICmpAndOr`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D148744: [InstCombine] Refactor foldSelectICmpAndOr to use `decomposeBitTestICmp` instead of bespoke logic
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D148414: [InstCombine] Expand `foldSelectICmpAndOr` -> `foldSelectICmpAndBinOp` to work for more binops
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D148415: [InstCombine] Improve cost calculation in foldSelectICmpAndBinOp
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D154809: [LoongArch] Add tests for (and (add x, c1), (lshr y, c2))
hev via Phabricator via llvm-commits
- [PATCH] D154762: [LoongArch] Implement isLegalAddImmediate
hev via Phabricator via llvm-commits
- [llvm] ab513fe - [Attributor] Ensure call sites with missing callees are tracked
Johannes Doerfert via llvm-commits
- [llvm] 900b665 - [Attributor] Avoid running trivial AA initializers
Johannes Doerfert via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpaceInfo to deduce address spaces
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpace to deduce address spaces
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D154810: [LoongArch] Add tests for (X & -256) == 256 -> (X >> 8) == 1
hev via Phabricator via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpace to deduce address spaces
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D154811: [LoongArch] Implement isLegalICmpImmediate
hev via Phabricator via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpace to deduce address spaces
Johannes Doerfert via Phabricator via llvm-commits
- [llvm] f3bd221 - [NFC] clang-format attributor related files
Shilei Tian via llvm-commits
- [PATCH] D120586: [Attributor] Add AAAddressSpace to deduce address spaces
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D154812: [Support] Add llvm::xxh3_64bits
Fangrui Song via Phabricator via llvm-commits
- [llvm] 8542d8f - [Attributor][FIX] Ensure the function manager cache is updated
Johannes Doerfert via llvm-commits
- [PATCH] D153614: [CSKY] Optimize ANDI/ORI to BCLRI/BSETI for specific immediates
Ben Shi via Phabricator via llvm-commits
- [PATCH] D154813: [ELF] Use llvm::xxh3_64bits for MergeInputSection::splitStrings
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D154813: [ELF] Use llvm::xxh3_64bits for MergeInputSection::splitStrings
Fangrui Song via Phabricator via llvm-commits
- [llvm] 2c64226 - [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
via llvm-commits
- [PATCH] D154193: [X86]Remove TEST in AND32ri+TEST16rr in peephole-opt
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.
witstorm via Phabricator via llvm-commits
- [llvm] 61358d4 - [JITLink][PowerPC] Add TOC and relocations for ppc64
Kai Luo via llvm-commits
- [PATCH] D154198: [JITLink][PowerPC] Add TOC and relocations for ppc64
Kai Luo via Phabricator via llvm-commits
- [llvm] df38792 - [Attributor][FIX] Add missing check lines for test
Johannes Doerfert via llvm-commits
- [PATCH] D154638: Emit a .debug_addr section with dsymutil
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D154638: Emit a .debug_addr section with dsymutil
Thorsten via Phabricator via llvm-commits
- [PATCH] D154589: MIPS: setMaxAtomicSizeInBitsSupported to 32 for MIPS I
YunQiang Su via Phabricator via llvm-commits
- [PATCH] D82525: [FPEnv] Intrinsics for access to FP control modes
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D154815: [BOLT] Add reading support for Linux ORC sections
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.
Chuanqi Xu via Phabricator via llvm-commits
- [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D151449: [RISCV] Add DAG combine for CTTZ/CTLZ in the case of input 0
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D154808: [RISCV] Add tests for (and (add x, c1), (lshr y, c2))
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.
Hongyu Chen via Phabricator via llvm-commits
- [PATCH] D154808: [RISCV] Add tests for (and (add x, c1), (lshr y, c2))
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154760: [DAGCombine] Canonicalize operands for visitANDLike
Craig Topper via Phabricator via llvm-commits
- [PATCH] D154198: [JITLink][PowerPC] Add TOC and relocations for ppc64
NAKAMURA Takumi via Phabricator via llvm-commits
- [PATCH] D82525: [FPEnv] Intrinsics for access to FP control modes
Serge Pavlov via Phabricator via llvm-commits
Last message date:
Sun Jul 9 23:49:56 PDT 2023
Archived on: Sun Jul 9 23:49:59 PDT 2023
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