[PATCH] D154447: [PowerPC] Improve code gen for vector add

[Stefan Pintilie via Phabricator via llvm-commits]

stefanp added a comment.

I think that this patch is fine but I think there may be something missing in terms of `vaddudm` . Currently a test case like this one:

  define dso_local <2 x i64> @x2d(<2 x i64> noundef %x) {
  entry:
    %add = shl <2 x i64> %x, <i64 1, i64 1>
    ret <2 x i64> %add
  }

Produces some fairly inefficient code:

  x2d:                                    # @x2d
  .Lfunc_begin3:
          .cfi_startproc
  .Lfunc_gep3:
          addis 2, 12, .TOC.-.Lfunc_gep3 at ha
          addi 2, 2, .TOC.-.Lfunc_gep3 at l
  .Lfunc_lep3:
          .localentry     x2d, .Lfunc_lep3-.Lfunc_gep3
  # %bb.0:                                # %entry
          addis 3, 2, .LCPI3_0 at toc@ha
          addi 3, 3, .LCPI3_0 at toc@l
          lxv 35, 0(3)
          vsld 2, 2, 3
          blr

We even do a TOC access.

Unfortunately, this isn't just a case of adding:

  def : Pat<(v2i64 (shl v2i64:$vA, (v2i64 (immEQOneV)))),
            (v2i64 (VADDUDM $vA, $vA))>;

like the others but I think it may be worth doing.

At this point maybe just add the test case and we can deal with the issue at a later date.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D154447/new/

https://reviews.llvm.org/D154447