[llvm] a1b3b9d - [llvm-mca][RISCV] Fix typo in test for vsetvli instruction
Michael Maitland via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 5 12:43:43 PDT 2023
Author: Michael Maitland
Date: 2023-07-05T12:43:20-07:00
New Revision: a1b3b9d05d53b4b178ecb635328250948abaa13c
URL: https://github.com/llvm/llvm-project/commit/a1b3b9d05d53b4b178ecb635328250948abaa13c
DIFF: https://github.com/llvm/llvm-project/commit/a1b3b9d05d53b4b178ecb635328250948abaa13c.diff
LOG: [llvm-mca][RISCV] Fix typo in test for vsetvli instruction
The instrument comment specified a different LMUL than the vsetvli
above it. This patch syncs the LMUL comment and the vsetvli.
Differential Revision: https://reviews.llvm.org/D154525
Added:
Modified:
llvm/test/tools/llvm-mca/RISCV/instrument-in-middle.s
llvm/test/tools/llvm-mca/RISCV/multiple-same-instruments.s
Removed:
################################################################################
diff --git a/llvm/test/tools/llvm-mca/RISCV/instrument-in-middle.s b/llvm/test/tools/llvm-mca/RISCV/instrument-in-middle.s
index 0279de01f04721..cd477b60d7f56a 100644
--- a/llvm/test/tools/llvm-mca/RISCV/instrument-in-middle.s
+++ b/llvm/test/tools/llvm-mca/RISCV/instrument-in-middle.s
@@ -2,7 +2,7 @@
# RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-x280 -timeline -iterations=1 < %s | FileCheck %s
vadd.vv v12, v12, v12
-vsetvli zero, a0, e8, m8, tu, mu
+vsetvli zero, a0, e8, mf8, tu, mu
# LLVM-MCA-RISCV-LMUL MF8
vadd.vv v12, v12, v12
@@ -26,7 +26,7 @@ vadd.vv v12, v12, v12
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 4 16.00 vadd.vv v12, v12, v12
-# CHECK-NEXT: 1 3 1.00 U vsetvli zero, a0, e8, m8, tu, mu
+# CHECK-NEXT: 1 3 1.00 U vsetvli zero, a0, e8, mf8, tu, mu
# CHECK-NEXT: 1 4 1.00 vadd.vv v12, v12, v12
# CHECK: Resources:
@@ -46,7 +46,7 @@ vadd.vv v12, v12, v12
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:
# CHECK-NEXT: - - - - 16.00 16.00 - - vadd.vv v12, v12, v12
-# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, a0, e8, m8, tu, mu
+# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, a0, e8, mf8, tu, mu
# CHECK-NEXT: - - - - 1.00 1.00 - - vadd.vv v12, v12, v12
# CHECK: Timeline view:
@@ -54,7 +54,7 @@ vadd.vv v12, v12, v12
# CHECK-NEXT: Index 0123456789 0
# CHECK: [0,0] DeeeE. . . . vadd.vv v12, v12, v12
-# CHECK-NEXT: [0,1] .DeeE. . . . vsetvli zero, a0, e8, m8, tu, mu
+# CHECK-NEXT: [0,1] .DeeE. . . . vsetvli zero, a0, e8, mf8, tu, mu
# CHECK-NEXT: [0,2] . . . .DeeeE vadd.vv v12, v12, v12
# CHECK: Average Wait times (based on the timeline view):
@@ -65,6 +65,6 @@ vadd.vv v12, v12, v12
# CHECK: [0] [1] [2] [3]
# CHECK-NEXT: 0. 1 0.0 0.0 0.0 vadd.vv v12, v12, v12
-# CHECK-NEXT: 1. 1 0.0 0.0 0.0 vsetvli zero, a0, e8, m8, tu, mu
+# CHECK-NEXT: 1. 1 0.0 0.0 0.0 vsetvli zero, a0, e8, mf8, tu, mu
# CHECK-NEXT: 2. 1 0.0 0.0 0.0 vadd.vv v12, v12, v12
# CHECK-NEXT: 1 0.0 0.0 0.0 <total>
diff --git a/llvm/test/tools/llvm-mca/RISCV/multiple-same-instruments.s b/llvm/test/tools/llvm-mca/RISCV/multiple-same-instruments.s
index 621953deac4de3..42443535612448 100644
--- a/llvm/test/tools/llvm-mca/RISCV/multiple-same-instruments.s
+++ b/llvm/test/tools/llvm-mca/RISCV/multiple-same-instruments.s
@@ -8,7 +8,7 @@ vsetvli zero, a0, e8, m1, tu, mu
# LLVM-MCA-RISCV-LMUL M1
vadd.vv v12, v12, v12
vsub.vv v12, v12, v12
-vsetvli zero, a0, e8, m2, tu, mu
+vsetvli zero, a0, e8, m4, tu, mu
# LLVM-MCA-RISCV-LMUL M4
vadd.vv v12, v12, v12
vsub.vv v12, v12, v12
@@ -37,7 +37,7 @@ vsub.vv v12, v12, v12
# CHECK-NEXT: 1 3 1.00 U vsetvli zero, a0, e8, m1, tu, mu
# CHECK-NEXT: 1 4 2.00 vadd.vv v12, v12, v12
# CHECK-NEXT: 1 4 2.00 vsub.vv v12, v12, v12
-# CHECK-NEXT: 1 3 1.00 U vsetvli zero, a0, e8, m2, tu, mu
+# CHECK-NEXT: 1 3 1.00 U vsetvli zero, a0, e8, m4, tu, mu
# CHECK-NEXT: 1 4 8.00 vadd.vv v12, v12, v12
# CHECK-NEXT: 1 4 8.00 vsub.vv v12, v12, v12
@@ -62,7 +62,7 @@ vsub.vv v12, v12, v12
# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, a0, e8, m1, tu, mu
# CHECK-NEXT: - - - - 2.00 2.00 - - vadd.vv v12, v12, v12
# CHECK-NEXT: - - - - 2.00 2.00 - - vsub.vv v12, v12, v12
-# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, a0, e8, m2, tu, mu
+# CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, a0, e8, m4, tu, mu
# CHECK-NEXT: - - - - 8.00 8.00 - - vadd.vv v12, v12, v12
# CHECK-NEXT: - - - - 8.00 8.00 - - vsub.vv v12, v12, v12
@@ -75,7 +75,7 @@ vsub.vv v12, v12, v12
# CHECK-NEXT: [0,2] . DeeE . . . . . vsetvli zero, a0, e8, m1, tu, mu
# CHECK-NEXT: [0,3] . . DeeeE . . . . vadd.vv v12, v12, v12
# CHECK-NEXT: [0,4] . . .DeeeE . . . vsub.vv v12, v12, v12
-# CHECK-NEXT: [0,5] . . . DeeE . . . vsetvli zero, a0, e8, m2, tu, mu
+# CHECK-NEXT: [0,5] . . . DeeE . . . vsetvli zero, a0, e8, m4, tu, mu
# CHECK-NEXT: [0,6] . . . DeeeE. . . vadd.vv v12, v12, v12
# CHECK-NEXT: [0,7] . . . . . DeeeE vsub.vv v12, v12, v12
@@ -91,7 +91,7 @@ vsub.vv v12, v12, v12
# CHECK-NEXT: 2. 1 0.0 0.0 0.0 vsetvli zero, a0, e8, m1, tu, mu
# CHECK-NEXT: 3. 1 0.0 0.0 0.0 vadd.vv v12, v12, v12
# CHECK-NEXT: 4. 1 0.0 0.0 0.0 vsub.vv v12, v12, v12
-# CHECK-NEXT: 5. 1 0.0 0.0 0.0 vsetvli zero, a0, e8, m2, tu, mu
+# CHECK-NEXT: 5. 1 0.0 0.0 0.0 vsetvli zero, a0, e8, m4, tu, mu
# CHECK-NEXT: 6. 1 0.0 0.0 0.0 vadd.vv v12, v12, v12
# CHECK-NEXT: 7. 1 0.0 0.0 0.0 vsub.vv v12, v12, v12
# CHECK-NEXT: 1 0.0 0.0 0.0 <total>
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