[llvm] 2e0af16 - [ValueTracking] Support add+icmp assumes for KnownBits

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2023-07-05T16:15:47+02:00
New Revision: 2e0af16c9383bb5ed0eda236eb34b92dfb570235

URL: https://github.com/llvm/llvm-project/commit/2e0af16c9383bb5ed0eda236eb34b92dfb570235
DIFF: https://github.com/llvm/llvm-project/commit/2e0af16c9383bb5ed0eda236eb34b92dfb570235.diff

LOG: [ValueTracking] Support add+icmp assumes for KnownBits

Support the canonical range check pattern for KnownBits assumptions.
This is the same as the generic ConstantRange handling, just shifted
by an offset.

Added: 
    

Modified: 
    llvm/lib/Analysis/ValueTracking.cpp
    llvm/test/Analysis/ValueTracking/numsignbits-from-assume.ll
    llvm/test/Transforms/InstCombine/assume.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index b98615da444189..412699eb0bb3e5 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -766,12 +766,16 @@ static void computeKnownBitsFromCmp(const Value *V, const ICmpInst *Cmp,
     break;
   }
   default:
-    if (match(Cmp, m_ICmp(Pred, m_V, m_Value(A)))) {
+    const APInt *Offset = nullptr;
+    if (match(Cmp, m_ICmp(Pred, m_CombineOr(m_V, m_Add(m_V, m_APInt(Offset))),
+                          m_Value(A)))) {
       KnownBits RHSKnown = computeKnownBits(A, Depth + 1, QueryNoAC);
       ConstantRange RHSRange =
           ConstantRange::fromKnownBits(RHSKnown, Cmp->isSigned());
       ConstantRange LHSRange =
           ConstantRange::makeAllowedICmpRegion(Pred, RHSRange);
+      if (Offset)
+        LHSRange = LHSRange.sub(*Offset);
       Known = Known.unionWith(LHSRange.toKnownBits());
     }
     break;

diff  --git a/llvm/test/Analysis/ValueTracking/numsignbits-from-assume.ll b/llvm/test/Analysis/ValueTracking/numsignbits-from-assume.ll
index 835d768e6ad6c4..5beb0c7cadfbaa 100644
--- a/llvm/test/Analysis/ValueTracking/numsignbits-from-assume.ll
+++ b/llvm/test/Analysis/ValueTracking/numsignbits-from-assume.ll
@@ -48,7 +48,7 @@ define i32 @computeNumSignBits_sub1(i32 %in) {
 
 define i32 @computeNumSignBits_sub2(i32 %in) {
 ; CHECK-LABEL: @computeNumSignBits_sub2(
-; CHECK-NEXT:    [[SUB:%.*]] = add i32 [[IN:%.*]], -1
+; CHECK-NEXT:    [[SUB:%.*]] = add nsw i32 [[IN:%.*]], -1
 ; CHECK-NEXT:    [[COND:%.*]] = icmp ult i32 [[SUB]], 43
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[COND]])
 ; CHECK-NEXT:    [[SH:%.*]] = shl nuw nsw i32 [[SUB]], 3

diff  --git a/llvm/test/Transforms/InstCombine/assume.ll b/llvm/test/Transforms/InstCombine/assume.ll
index 1c73d86986b7ce..ee6d86610274bf 100644
--- a/llvm/test/Transforms/InstCombine/assume.ll
+++ b/llvm/test/Transforms/InstCombine/assume.ll
@@ -266,7 +266,7 @@ define i32 @bundle2(ptr %P) {
 
 define i1 @nonnull1(ptr %a) {
 ; CHECK-LABEL: @nonnull1(
-; CHECK-NEXT:    [[LOAD:%.*]] = load ptr, ptr [[A:%.*]], align 8, !nonnull !6, !noundef !6
+; CHECK-NEXT:    [[LOAD:%.*]] = load ptr, ptr [[A:%.*]], align 8, !nonnull [[META6:![0-9]+]], !noundef [[META6]]
 ; CHECK-NEXT:    tail call void @escape(ptr nonnull [[LOAD]])
 ; CHECK-NEXT:    ret i1 false
 ;
@@ -871,8 +871,7 @@ define i32 @range_16_30_top28(i32 %x) {
 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[X:%.*]], -16
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[ADD]], 15
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
-; CHECK-NEXT:    [[RES:%.*]] = and i32 [[X]], -16
-; CHECK-NEXT:    ret i32 [[RES]]
+; CHECK-NEXT:    ret i32 16
 ;
   %add = add i32 %x, -16
   %cmp = icmp ult i32 %add, 15
@@ -886,7 +885,7 @@ define i32 @range_16_32_top28(i32 %x) {
 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[X:%.*]], -16
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[ADD]], 17
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
-; CHECK-NEXT:    [[RES:%.*]] = and i32 [[X]], -16
+; CHECK-NEXT:    [[RES:%.*]] = and i32 [[X]], 48
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %add = add i32 %x, -16
@@ -901,7 +900,7 @@ define i32 @range_16_32_top27(i32 %x) {
 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[X:%.*]], -16
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[ADD]], 17
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
-; CHECK-NEXT:    [[RES:%.*]] = and i32 [[X]], -32
+; CHECK-NEXT:    [[RES:%.*]] = and i32 [[X]], 32
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %add = add i32 %x, -16
@@ -916,8 +915,7 @@ define i32 @range_16_32_top26(i32 %x) {
 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[X:%.*]], -16
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[ADD]], 17
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
-; CHECK-NEXT:    [[RES:%.*]] = and i32 [[X]], -64
-; CHECK-NEXT:    ret i32 [[RES]]
+; CHECK-NEXT:    ret i32 0
 ;
   %add = add i32 %x, -16
   %cmp = icmp ult i32 %add, 17
@@ -931,7 +929,7 @@ define i32 @range_15_31_top28(i32 %x) {
 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[X:%.*]], -15
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[ADD]], 16
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
-; CHECK-NEXT:    [[RES:%.*]] = and i32 [[X]], -16
+; CHECK-NEXT:    [[RES:%.*]] = and i32 [[X]], 16
 ; CHECK-NEXT:    ret i32 [[RES]]
 ;
   %add = add i32 %x, -15
@@ -946,8 +944,7 @@ define i32 @range_15_31_top27(i32 %x) {
 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[X:%.*]], -15
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[ADD]], 16
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
-; CHECK-NEXT:    [[RES:%.*]] = and i32 [[X]], -32
-; CHECK-NEXT:    ret i32 [[RES]]
+; CHECK-NEXT:    ret i32 0
 ;
   %add = add i32 %x, -15
   %cmp = icmp ult i32 %add, 16