[PATCH] D154744: [RISCV] Don't allow X0 to be used for 'r' constraint in inline assembly

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D154744#4481932 <https://reviews.llvm.org/D154744#4481932>, @jrtc27 wrote:

> Does `__asm__("%z0" :: "r"(0));` still work and give x0?

That doesn't work in gcc https://godbolt.org/z/x3vPWao1d


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https://reviews.llvm.org/D154744