[PATCH] D152714: [AArch64][Optimization]Solving the FCCMP issue

[Sam Tebbs via Phabricator via llvm-commits]

samtebbs added a comment.

Thanks! Just a couple more clean-up changes from me and I'll add another reviewer for a wider audience.



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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16386
+                                      TargetLowering::DAGCombinerInfo &DCI) {
+  SDLoc DL(N);
+  AArch64CC::CondCode AArch64CC;
----------------
This could be moved to be just before the line it's used on.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16387
+  SDLoc DL(N);
+  AArch64CC::CondCode AArch64CC;
+  SDValue Cmp, Cset;
----------------
This could be moved to be just before where's it's used and AArch64CC seems like a verbose name so maybe just CC is enough.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16388
+  AArch64CC::CondCode AArch64CC;
+  SDValue Cmp, Cset;
+  SDValue SetCC = N->getOperand(0);
----------------
Same story with Cmp as it could be moved to be just before where it's set,


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16404-16409
+      Cset =
+          DAG.getNode(AArch64ISD::CSINC, DL, VT, DAG.getRegister(ZeroReg, VT),
+                      DAG.getRegister(ZeroReg, VT),
+                      DAG.getConstant(InvertedCC, DL, MVT::i32), Cmp);
+
+      return Cset;
----------------
This can just return the value from DAG.getNode(...)


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16411
+    }
+  }
+}
----------------
We'll need a default return of `SDValue()` in case the if statements above don't pass.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D152714/new/

https://reviews.llvm.org/D152714